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    Semiconductor having isolated gate structure
    1.
    发明授权
    Semiconductor having isolated gate structure 有权

    公开(公告)号：US10134858B2

    公开(公告)日：2018-11-20

    申请号：US15493154

    申请日：2017-04-21

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Tian Choy Gan ,  Chu-Yun Hsiao ,  Chun-Che Huang ,  Chia-Fu Hsu

    IPC: H01L29/06 ,  H01L29/40 ,  H01L23/535 ,  H01L29/423 ,  H01L21/762 ,  H01L21/768 ,  H01L21/02

    Abstract: A semiconductor process includes the following step. A metal gate strip and a cap layer are sequentially formed in a trench of a dielectric layer. The cap layer and the metal gate strip are cut off to form a plurality of caps on a plurality of metal gates, and a gap isolates adjacent caps and adjacent metal gates. An isolation material fills in the gap. The present invention also provides semiconductor structures formed by said semiconductor process. For example, the semiconductor structure includes a plurality of stacked structures in a trench of a dielectric layer, where each of the stacked structures includes a metal gate and a cap on the metal gate, where an isolation slot isolates and contacts adjacent stacked structures at end to end, and the isolation slot has same level as the stacked structures.

    SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF
    2.
    发明申请
    SEMICONDUCTOR STRUCTURE AND PROCESS THEREOF 有权
    半导体结构及其工艺

    公开(公告)号：US20160300755A1

    公开(公告)日：2016-10-13

    申请号：US14711777

    申请日：2015-05-14

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Tian Choy Gan ,  Chu-Yun Hsiao ,  Chun-Che Huang ,  Chia-Fu Hsu

    IPC: H01L21/762 ,  H01L21/02 ,  H01L29/423 ,  H01L21/768

    CPC classification number: H01L29/4236 ,  H01L21/02274 ,  H01L21/76224 ,  H01L21/7684 ,  H01L21/76897 ,  H01L23/535 ,  H01L29/0649 ,  H01L29/401 ,  H01L29/42384

    Abstract: A semiconductor process includes the following step. A metal gate strip and a cap layer are sequentially formed in a trench of a dielectric layer. The cap layer and the metal gate strip are cut off to form a plurality of caps on a plurality of metal gates, and a gap isolates adjacent caps and adjacent metal gates. An isolation material fills in the gap. The present invention also provides semiconductor structures formed by said semiconductor process. For example, the semiconductor structure includes a plurality of stacked structures in a trench of a dielectric layer, where each of the stacked structures includes a metal gate and a cap on the metal gate, where an isolation slot isolates and contacts adjacent stacked structures at end to end, and the isolation slot has same level as the stacked structures.

    Abstract translation: 半导体工艺包括以下步骤。 在电介质层的沟槽中依次形成金属栅极条和盖层。 切割盖层和金属栅极条以在多个金属栅极上形成多个盖，并且间隙隔离相邻的盖和相邻的金属栅。 隔离材料填补了间隙。 本发明还提供了由所述半导体工艺形成的半导体结构。 例如，半导体结构在电介质层的沟槽中包括多个堆叠结构，其中每个堆叠结构在金属栅极上包括金属栅极和盖子，其中隔离槽在端部隔离并接触相邻堆叠结构 结束，并且隔离槽具有与堆叠结构相同的水平。

    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
    5.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME 有权
    半导体器件及其形成方法

    公开(公告)号：US20160276224A1

    公开(公告)日：2016-09-22

    申请号：US14686787

    申请日：2015-04-15

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Tian Choy Gan ,  Chu-Yun Hsiao ,  Chia-Fu Hsu

    IPC: H01L21/8238 ,  H01L21/265 ,  H01L27/092 ,  H01L29/66

    CPC classification number: H01L27/0922 ,  H01L21/26513 ,  H01L21/82345 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/82385 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/66537 ,  H01L29/66545

    Abstract: The present invention provides a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a first transistor and a second transistor. The first transistor and the second transistor are disposed on the substrate. The first transistor includes a first channel and a first work function layer. The second transistor includes a second channel and a second work function layer, where the first channel and the second channel include different dopants, and the second work function layer and the first work function layer have a same conductive type and different thicknesses.

    Abstract translation: 本发明提供一种半导体器件及其形成方法。 半导体器件包括衬底，第一晶体管和第二晶体管。 第一晶体管和第二晶体管设置在基板上。 第一晶体管包括第一通道和第一功能层。 第二晶体管包括第二沟道和第二功函数层，其中第一沟道和第二沟道包括不同的掺杂剂，第二功函数层和第一功函数层具有相同的导电类型和不同的厚度。

    Semiconductor device and method of forming the same
    6.
    发明授权
    Semiconductor device and method of forming the same 有权

    公开(公告)号：US10109630B2

    公开(公告)日：2018-10-23

    申请号：US15604638

    申请日：2017-05-24

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Tian Choy Gan ,  Chu-Yun Hsiao ,  Chia-Fu Hsu

    IPC: H01L27/092 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/265

    Abstract: The present invention provides a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a first transistor and a second transistor. The first transistor and the second transistor are disposed on the substrate. The first transistor includes a first channel and a first work function layer. The second transistor includes a second channel and a second work function layer, where the first channel and the second channel include different dopants, and the second work function layer and the first work function layer have a same conductive type and different thicknesses.

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