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公开(公告)号：US09673053B2
公开(公告)日：2017-06-06
申请号：US14549529
申请日：2014-11-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Rung-Yuan Lee , Yu-Ting Li , Jing-Yin Jhang , Chen-Yi Weng , Jia-Feng Fang , Yi-Wei Chen , Wei-Jen Wu , Po-Cheng Huang , Fu-Shou Tsai , Kun-Ju Li , Wen-Chin Lin , Chih-Chien Liu , Chih-Hsun Lin , Chun-Yuan Wu
IPC: H01L21/306 , H01L21/28
CPC classification number: H01L21/30625 , H01L21/28123 , H01L21/32115 , H01L21/3212
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a first material layer on the substrate; forming a stop layer on the first material layer; forming a second material layer on the stop layer; and performing a planarizing process to remove the second material layer, the stop layer, and part of the first material layer for forming a gate layer.
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公开(公告)号：US11778917B2
公开(公告)日：2023-10-03
申请号：US16985206
申请日：2020-08-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chia-Wei Liu , Jia-Feng Fang , Chun-Hsien Lin
Abstract: A method for fabricating semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) stack on a substrate, performing an etching process to remove the MTJ stack for forming a MTJ, performing a deposition process to form a polymer on a sidewall of the MTJ, and removing the polymer to form a rough surface on the sidewall of the MTJ. Preferably, the MTJ could include a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer, in which the rough surface could appear on sidewall of the pinned layer, sidewall of the barrier layer, and/or sidewall of the free layer.
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公开(公告)号：US10818556B2
公开(公告)日：2020-10-27
申请号：US16223036
申请日：2018-12-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hao-Yeh Liu , Jia-Feng Fang , Yu-Hsiang Lin , Ching-Hsiang Chiu , Chia-Wei Liu
IPC: H01L29/00 , H01L21/8234 , H01L21/762 , H01L21/3105 , H01L21/02 , H01L21/311 , H01L29/66 , H01L27/088 , H01L29/78 , H01L21/027
Abstract: A method for forming a semiconductor structure is provided. Multiple fins extending along a first direction are formed in a semiconductor substrate. The multiple fins includes a group of active fins, a pair of protection fins sandwiching about the group the active fins, and at least one dummy fin around the pair of protection fins. A fin cut process is performed to remove the at least one dummy fin around the pair of protection fins. After performing the fin cut process, trench isolation structures are formed within the trenches between the multiple fins. The trench isolation structures are subjected to an anneal process. After annealing the trench isolation structures, the pair of protection fins is removed.
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公开(公告)号：US20220013715A1
公开(公告)日：2022-01-13
申请号：US16985206
申请日：2020-08-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chia-Wei Liu , Jia-Feng Fang , Chun-Hsien Lin
Abstract: A method for fabricating semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) stack on a substrate, performing an etching process to remove the MTJ stack for forming a MTJ, performing a deposition process to form a polymer on a sidewall of the MTJ, and removing the polymer to form a rough surface on the sidewall of the MTJ. Preferably, the MTJ could include a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer, in which the rough surface could appear on sidewall of the pinned layer, sidewall of the barrier layer, and/or sidewall of the free layer.
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公开(公告)号：US20160148816A1
公开(公告)日：2016-05-26
申请号：US14549529
申请日：2014-11-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Rung-Yuan Lee , Yu-Ting Li , Jing-Yin Jhang , Chen-Yi Weng , Jia-Feng Fang , Yi-Wei Chen , Wei-Jen Wu , Po-Cheng Huang , Fu-Shou Tsai , Kun-Ju Li , Wen-Chin Lin , Chih-Chien Liu , Chih-Hsun Lin , Chun-Yuan Wu
IPC: H01L21/306 , H01L21/28
CPC classification number: H01L21/30625 , H01L21/28123 , H01L21/32115 , H01L21/3212
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a first material layer on the substrate; forming a stop layer on the first material layer; forming a second material layer on the stop layer; and performing a planarizing process to remove the second material layer, the stop layer, and part of the first material layer for forming a gate layer.
Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供衬底; 在所述基板上形成第一材料层; 在所述第一材料层上形成停止层; 在所述停止层上形成第二材料层; 并且进行平面化处理以去除第二材料层，停止层以及用于形成栅极层的第一材料层的一部分。
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Patent Agency Ranking
公开(公告)号：US20250072294A1
公开(公告)日：2025-02-27
申请号：US18946936
申请日：2024-11-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chia-Wei Liu , Jia-Feng Fang , Chun-Hsien Lin
Abstract: A method for fabricating semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) stack on a substrate, performing an etching process to remove the MTJ stack for forming a MTJ, performing a deposition process to form a polymer on a sidewall of the MTJ, and removing the polymer to form a rough surface on the sidewall of the MTJ. Preferably, the MTJ could include a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer, in which the rough surface could appear on sidewall of the pinned layer, sidewall of the barrier layer, and/or sidewall of the free layer.
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公开(公告)号：US12178136B2
公开(公告)日：2024-12-24
申请号：US18239119
申请日：2023-08-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chia-Wei Liu , Jia-Feng Fang , Chun-Hsien Lin
Abstract: A method for fabricating semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) stack on a substrate, performing an etching process to remove the MTJ stack for forming a MTJ, performing a deposition process to form a polymer on a sidewall of the MTJ, and removing the polymer to form a rough surface on the sidewall of the MTJ. Preferably, the MTJ could include a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer, in which the rough surface could appear on sidewall of the pinned layer, sidewall of the barrier layer, and/or sidewall of the free layer.
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公开(公告)号：US20230403942A1
公开(公告)日：2023-12-14
申请号：US18239119
申请日：2023-08-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chia-Wei Liu , Jia-Feng Fang , Chun-Hsien Lin
Abstract: A method for fabricating semiconductor device includes the steps of forming a magnetic tunneling junction (MTJ) stack on a substrate, performing an etching process to remove the MTJ stack for forming a MTJ, performing a deposition process to form a polymer on a sidewall of the MTJ, and removing the polymer to form a rough surface on the sidewall of the MTJ. Preferably, the MTJ could include a pinned layer on the substrate, a barrier layer on the pinned layer, and a free layer on the barrier layer, in which the rough surface could appear on sidewall of the pinned layer, sidewall of the barrier layer, and/or sidewall of the free layer.
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公开(公告)号：US09530871B1
公开(公告)日：2016-12-27
申请号：US15225836
申请日：2016-08-02
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Ming-Yueh Tsai , Jia-Feng Fang , Yi-Wei Chen , Jing-Yin Jhang , Rung-Yuan Lee , Chen-Yi Weng , Wei-Jen Wu
IPC: H01L21/8232 , H01L29/66 , H01L21/02 , H01L21/324
CPC classification number: H01L29/66795 , H01L21/02126 , H01L21/0214 , H01L21/02164 , H01L21/324 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L29/0847 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/7848 , H01L29/7851
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming an epitaxial layer on the fin-shaped structure; forming a first contact etch stop layer (CESL) on the epitaxial layer; forming a source/drain region in the epitaxial layer; and forming a second CESL on the first CESL.
Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供其上具有鳍状结构的基板; 在鳍状结构上形成外延层; 在外延层上形成第一接触蚀刻停止层（CESL）; 在外延层中形成源/漏区; 并在第一个CESL上形成第二个CESL。
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公开(公告)号：US09443757B1
公开(公告)日：2016-09-13
申请号：US14940120
申请日：2015-11-12
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Ming-Yueh Tsai , Jia-Feng Fang , Yi-Wei Chen , Jing-Yin Jhang , Rung-Yuan Lee , Chen-Yi Weng , Wei-Jen Wu
IPC: H01L29/78 , H01L21/768 , H01L29/161 , H01L29/16 , H01L29/165 , H01L29/08 , H01L23/535 , H01L29/66
CPC classification number: H01L29/66795 , H01L21/02126 , H01L21/0214 , H01L21/02164 , H01L21/324 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L29/0847 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/7848 , H01L29/7851
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming an epitaxial layer on the fin-shaped structure; forming a first contact etch stop layer (CESL) on the epitaxial layer; forming a source/drain region in the epitaxial layer; and forming a second CESL on the first CESL.
Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供其上具有鳍状结构的基板; 在鳍状结构上形成外延层; 在外延层上形成第一接触蚀刻停止层（CESL）; 在外延层中形成源/漏区; 并在第一个CESL上形成第二个CESL。
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