公开(公告)号：US20160322372A1

公开(公告)日：2016-11-03

申请号：US14726984

申请日：2015-06-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Qiu-Ji Zhao ,  Ling Wu ,  Wei Meng ,  Zhi-Hui Jiao ,  Zhi-Guo Li ,  Chi Ren

IPC: H01L27/115

CPC classification number: H01L27/11534 ,  H01L21/82345 ,  H01L27/11546 ,  H01L27/11548 ,  H01L27/11573

Abstract: A semiconductor device includes a substrate, a plurality of memory cells, a logic gate electrode and a high-voltage gate electrode. The substrate at least includes a memory area, a high-voltage area and a logic area. The memory cells are disposed in the memory area. The logic gate electrode is disposed on the logic area. The high-voltage gate electrode has a first portion and a second portion in contact with each other and stacked on the high-voltage area. The high-voltage gate electrode has a thickness substantially greater than that of the logic gate electrode.

Abstract translation: 半导体器件包括衬底，多个存储单元，逻辑门电极和高压栅电极。 基板至少包括存储区域，高压区域和逻辑区域。 存储单元被布置在存储器区域中。 逻辑门电极设置在逻辑区域上。 高电压栅电极具有彼此接触并堆叠在高电压区域上的第一部分和第二部分。 高压栅电极的厚度显着大于逻辑栅电极的厚度。

公开(公告)号：US09472562B1

公开(公告)日：2016-10-18

申请号：US14726984

申请日：2015-06-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Qiu-Ji Zhao ,  Ling Wu ,  Wei Meng ,  Zhi-Hui Jiao ,  Zhi-Guo Li ,  Chi Ren

IPC: H01L27/115

CPC classification number: H01L27/11534 ,  H01L21/82345 ,  H01L27/11546 ,  H01L27/11548 ,  H01L27/11573

Abstract: A semiconductor device includes a substrate, a plurality of memory cells, a logic gate electrode and a high-voltage gate electrode. The substrate at least includes a memory area, a high-voltage area and a logic area. The memory cells are disposed in the memory area. The logic gate electrode is disposed on the logic area. The high-voltage gate electrode has a first portion and a second portion in contact with each other and stacked on the high-voltage area. The high-voltage gate electrode has a thickness substantially greater than that of the logic gate electrode.

Abstract translation: 半导体器件包括衬底，多个存储单元，逻辑门电极和高压栅电极。 基板至少包括存储区域，高压区域和逻辑区域。 存储单元被布置在存储器区域中。 逻辑门电极设置在逻辑区域上。 高电压栅电极具有彼此接触并堆叠在高电压区域上的第一部分和第二部分。 高压栅电极的厚度显着大于逻辑栅电极的厚度。