公开(公告)号：US09691699B2

公开(公告)日：2017-06-27

申请号：US14931808

申请日：2015-11-03

Applicant: Unimicron Technology Corp.

Inventor： Chia-Chan Chang ,  Gwo-Chaur Chen ,  Yung-Tsai Chen

IPC: H05K3/10 ,  H01L23/498 ,  H01L21/48

CPC classification number: H05K1/09 ,  H01L21/4846 ,  H01L21/4875 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2224/16227 ,  H01L2224/81005 ,  H01L2924/1531 ,  H01L2924/3511 ,  H05K1/181 ,  H05K3/007 ,  H05K3/188 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y02P70/613

Abstract: A method for manufacturing a circuit structure is described as follows. Two patterned circuit layers are formed on a core layer. The patterned circuit layers are located on two opposite surfaces of the core layer. A patterned insulating layer is respectively formed on each of the patterned circuit layers. The patterned insulating layers respectively expose a portion of the patterned circuit layers. The core layer is removed so as to expose an upper surface of each of the patterned circuit layers and a top surface of each of the patterned insulating layers. The upper surface of each of the patterned circuit layers is aligned with the top surface of each of the patterned insulating layers.

公开(公告)号：US20170125337A1

公开(公告)日：2017-05-04

申请号：US14931808

申请日：2015-11-03

Applicant: Unimicron Technology Corp.

Inventor： Chia-Chan Chang ,  Gwo-Chaur Chen ,  Yung-Tsai Chen

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H05K1/09 ,  H01L21/4846 ,  H01L21/4875 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2224/16227 ,  H01L2224/81005 ,  H01L2924/1531 ,  H01L2924/3511 ,  H05K1/181 ,  H05K3/007 ,  H05K3/188 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y02P70/613

Abstract: A method for manufacturing a circuit structure is described as follows. Two patterned circuit layers are formed on a core layer. The patterned circuit layers are located on two opposite surfaces of the core layer. A patterned insulating layer is respectively formed on each of the patterned circuit layers. The patterned insulating layers respectively expose a portion of the patterned circuit layers. The core layer is removed so as to expose an upper surface of each of the patterned circuit layers and a top surface of each of the patterned insulating layers. The upper surface of each of the patterned circuit layers is aligned with the top surface of each of the patterned insulating layers.

公开(公告)号：US09955578B2

公开(公告)日：2018-04-24

申请号：US15593322

申请日：2017-05-12

Applicant: Unimicron Technology Corp.

Inventor： Chia-Chan Chang ,  Gwo-Chaur Chen ,  Yung-Tsai Chen

IPC: H05K1/18 ,  H01L21/673 ,  H05K1/09 ,  H05K3/18

CPC classification number: H05K1/09 ,  H01L21/4846 ,  H01L21/4875 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2224/16227 ,  H01L2224/81005 ,  H01L2924/1531 ,  H01L2924/3511 ,  H05K1/181 ,  H05K3/007 ,  H05K3/188 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y02P70/613

Abstract: A circuit structure includes a patterned circuit layer, a patterned insulating layer and a support plate. The patterned insulating layer covers a portion of the patterned circuit layer, wherein an upper surface of the patterned circuit layer is aligned with a top surface of the patterned insulating layer. The support plate is disposed on a bottom surface of the patterned insulating layer, wherein the support plate, the patterned insulating layer and the patterned circuit layer define a plurality of air gaps.

公开(公告)号：US20170251551A1

公开(公告)日：2017-08-31

申请号：US15593322

申请日：2017-05-12

Applicant: Unimicron Technology Corp.

Inventor： Chia-Chan Chang ,  Gwo-Chaur Chen ,  Yung-Tsai Chen

IPC: H05K1/09 ,  H05K3/18 ,  H05K1/18

CPC classification number: H05K1/09 ,  H01L21/4846 ,  H01L21/4875 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2224/16227 ,  H01L2224/81005 ,  H01L2924/1531 ,  H01L2924/3511 ,  H05K1/181 ,  H05K3/007 ,  H05K3/188 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y02P70/613

Abstract: A circuit structure includes a patterned circuit layer, a patterned insulating layer and a support plate. The patterned insulating layer covers a portion of the patterned circuit layer, wherein an upper surface of the patterned circuit layer is aligned with a top surface of the patterned insulating layer. The support plate is disposed on a bottom surface of the patterned insulating layer, wherein the support plate, the patterned insulating layer and the patterned circuit layer define a plurality of air gaps.