公开(公告)号：US10824581B2

公开(公告)日：2020-11-03

申请号：US15634396

申请日：2017-06-27

Applicant: Western Digital Technologies, Inc.

Inventor： Berck Nash ,  Randall Hess ,  Michael Walker ,  James Michael Reiser

IPC: G06F3/06 ,  G06F3/12 ,  G06F13/42 ,  G06F13/40

Abstract: Described herein are enhancements for managing multi-host Peripheral Component Interconnect Express (PCIe) switching. In one implementation, a PCIe switch coupled to a host processing system and PCIe slots may receive enumeration requests from the host processing system to identify available PCIe devices. In response to the enumeration requests, the PCIe switch may transfer responses to the host processing system indicating device identifier information for PCIe devices associated with the PCIe slots even if one or more of the PCIe devices is not currently installed.

公开(公告)号：US20200151130A1

公开(公告)日：2020-05-14

申请号：US16741667

申请日：2020-01-13

Applicant: Western Digital Technologies, Inc.

Inventor： Susan Elkington ,  Randy Roberson ,  Randall Hess ,  Michael Stillwell ,  Michael Walker

IPC: G06F13/40 ,  G06F12/02 ,  G06F13/16 ,  G06F13/42

Abstract: Enhancements for managing quality of service in a multi-host Peripheral Component Interconnect Express (PCIe) switching environment involve a host system configured to maintain quality of service statistics corresponding to data interactions with a PCIe storage device available via a PCIe switch. The host system may further receive secondary quality of service statistics for one or more other host systems communicatively coupled to the PCIe device via the PCIe switch, and determine a maximum queue depth for the host system based on the quality of service statistics and the second quality of service statistics to maintain a quality of service for at least the host system.

公开(公告)号：US20190004988A1

公开(公告)日：2019-01-03

申请号：US15635687

申请日：2017-06-28

Applicant: Western Digital Technologies, Inc.

Inventor： Susan Elkington ,  Randy Roberson ,  Randall Hess ,  Michael Stillwell ,  Michael Walker

IPC: G06F13/40 ,  G06F13/42 ,  G06F13/16 ,  G06F12/02

CPC classification number: G06F13/4022 ,  G06F12/0246 ,  G06F13/161 ,  G06F13/4282 ,  G06F2212/7201 ,  G06F2213/0026 ,  G06F2213/0032

Abstract: Described herein are enhancements for managing quality of service in a multi-host Peripheral Component Interconnect Express (PCIe) switching environment. In one implementation, a host system is configured to maintain quality of service statistics corresponding to data interactions with a PCIe storage device available via a PCIe switch. The host system may further receive secondary quality of service statistics for one or more other host systems communicatively coupled to the PCIe device via the PCIe switch, and determine a maximum queue depth for the host system based on the quality of service statistics and the second quality of service statistics to maintain a quality of service for the host systems.

公开(公告)号：US20180373669A1

公开(公告)日：2018-12-27

申请号：US15634396

申请日：2017-06-27

Applicant: Western Digital Technologies, Inc.

Inventor： Berck Nash ,  Randall Hess ,  Michael Walker ,  James Michael Reiser

IPC: G06F13/42 ,  G06F13/40

CPC classification number: G06F13/4282 ,  G06F13/4022 ,  G06F13/4295 ,  G06F2213/0026

Abstract: Described herein are enhancements for managing multi-host Peripheral Component Interconnect Express (PCIe) switching. In one implementation, a PCIe switch coupled to a host processing system and PCIe slots may receive enumeration requests from the host processing system to identify available PCIe devices. In response to the enumeration requests, the PCIe switch may transfer responses to the host processing system indicating device identifier information for PCIe devices associated with the PCIe slots even if one or more of the PCIe devices is not currently installed

公开(公告)号：US10579567B2

公开(公告)日：2020-03-03

申请号：US15635687

申请日：2017-06-28

Applicant: Western Digital Technologies, Inc.

Inventor： Susan Elkington ,  Randy Roberson ,  Randall Hess ,  Michael Stillwell ,  Michael Walker

IPC: G06F13/40 ,  G06F13/42 ,  G06F13/16 ,  G06F12/02

Abstract: Described herein are enhancements for managing quality of service in a multi-host Peripheral Component Interconnect Express (PCIe) switching environment. In one implementation, a host system is configured to maintain quality of service statistics corresponding to data interactions with a PCIe storage device available via a PCIe switch. The host system may further receive secondary quality of service statistics for one or more other host systems communicatively coupled to the PCIe device via the PCIe switch, and determine a maximum queue depth for the host system based on the quality of service statistics and the second quality of service statistics to maintain a quality of service for the host systems.

公开(公告)号：US20180300283A1

公开(公告)日：2018-10-18

申请号：US15490490

申请日：2017-04-18

Applicant: Western Digital Technologies, Inc.

Inventor： Berck Nash ,  Michael Walker ,  Randall Hess

IPC: G06F13/42 ,  G06F13/24 ,  G06F13/40

Abstract: Described herein are enhancements for managing multi-host Peripheral Component Interconnect Express (PCIe) switching. In one implementation, a system includes one or more PCIe devices and a PCIe switch configured to receive a first interrupt corresponding to a first interrupt vector from a PCIe device, wherein the first interrupt vector comprises at least a virtual address and a first data value. The switch is further configured to translate the first interrupt vector into a second interrupt vector, wherein the second interrupt vector comprises a second address and a second data value, and transfer a second interrupt using the second interrupt vector to a host of a plurality of hosts that corresponds to the second interrupt vector.