公开(公告)号：US20140347835A1

公开(公告)日：2014-11-27

申请号：US14355192

申请日：2011-10-31

Applicant: Ryoichi Shimizu ,  Tohru Matsumoto ,  Takuya Hasegawa ,  Yoshio Imamura

Inventor： Ryoichi Shimizu ,  Tohru Matsumoto ,  Takuya Hasegawa ,  Yoshio Imamura

IPC: H05K3/40 ,  H05K3/30 ,  H05K1/18 ,  H05K1/11 ,  H05K1/02

CPC classification number: H05K3/4038 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/544 ,  H01L24/19 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L2221/68359 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32245 ,  H01L2224/82039 ,  H01L2224/82132 ,  H01L2224/83005 ,  H01L2224/83132 ,  H01L2224/8314 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/14 ,  H05K1/0266 ,  H05K1/0269 ,  H05K1/115 ,  H05K1/118 ,  H05K1/188 ,  H05K3/303 ,  H05K3/421 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4652 ,  H05K2201/09063 ,  H05K2201/09918 ,  H05K2203/063 ,  H05K2203/0703 ,  H05K2203/1461 ,  Y02P70/613 ,  Y10T29/49165

Abstract: The method includes positioning an electronic component using main marks formed on a metal layer and mounting the electronic component on a second surface of the metal layer with an adhesive layer interposed between the metal layer and both of the electronic component and terminals; then burying the electronic component and the main marks in an insulating substrate; then removing part of the metal layer and forming a first window for exposing the main marks therefrom and a second window for exposing the adhesive layer including a position corresponding to the terminal therefrom; then using the exposed main marks as references and forming a laser via hole LVH reaching the terminal in the adhesive layer exposed from the second window; and thereby forming a wiring pattern from the metal layer electrically connected to the terminal through a first conductive via formed by plating the LVH with copper.

Abstract translation: 该方法包括使用形成在金属层上的主要标记来定位电子部件，并且将金属层和电子部件和端子两者之间的粘合剂层安装在金属层的第二表面上; 然后将电子部件和主要标记埋入绝缘基板中; 然后去除金属层的一部分并形成用于暴露主要标记的第一窗口和用于暴露粘合剂层的第二窗口，其包括对应于其端子的位置; 然后使用暴露的主标记作为参考，并且形成从第二窗口暴露的粘合剂层中到达端子的激光通孔LVH; 从而通过使LVH与铜电镀而形成的第一导电通孔，从与金属层电连接的金属层形成布线图案。

公开(公告)号：US4378003A

公开(公告)日：1983-03-29

申请号：US225816

申请日：1981-01-16

Applicant: Yoshio Imamura

Inventor： Yoshio Imamura

IPC: F02B75/00 ,  F01N13/20 ,  F02D9/04 ,  F02D21/10 ,  F02M23/04 ,  F02M25/07 ,  F02M25/06

CPC classification number: F02D9/04 ,  F02M26/01 ,  F02M26/615 ,  Y02T10/14

Abstract: An internal combustion engine having first valve means disposed in the exhaust system and adapted to impart a resistance to the flow of exhaust gas to control the flow rate of the latter, and second valve means provided in the intake passage of said engine and adapted to introduce fresh air to the intake passage when r.p.m. of the engine has reached a predetermined value. During operation of the engine, a part of the exhaust gas is made to return into the combustion chamber due to the resistance imparted by the first valve means, and the unburned hydrocarbons in the exhaust gas returned to the combustion chamber are efficiently burned by the presence of fresh air which is introduced through the second valve means. Thus an improved internal combustion engine which can operate at a much improved fuel economy and which can minimize the emission of unburned hydrocarbons to the atmosphere is obtained.

Abstract translation: 一种内燃机，其具有设置在所述排气系统中的第一阀装置，其适于赋予废气流阻力以控制其的流量，以及设置在所述发动机的进气通道中的第二阀装置， 新鲜空气进入通道时转速 的发动机已经达到预定值。 在发动机运转期间，由于第一阀装置产生的阻力使一部分废气返回到燃烧室中，并且返回到燃烧室的废气中的未燃碳氢化合物被存在 通过第二阀装置引入的新鲜空气。 因此，可获得改进的内燃机，其能够以大大改善的燃料经济性运行并且可以将未燃烧的烃的排放最小化到大气中。

公开(公告)号：US4202307A

公开(公告)日：1980-05-13

申请号：US957157

申请日：1978-11-02

Applicant: Yoshio Imamura

Inventor： Yoshio Imamura

IPC: F02B1/04 ,  F02B23/08 ,  F02B29/00 ,  F02P13/00 ,  H01T13/08 ,  H01T13/14 ,  F02P23/00

CPC classification number: H01T13/08 ,  F02P13/00 ,  F02B1/04

Abstract: An ignition plug for an internal combustion engine which comprises a hollow cylindrical main body having one externally threaded end portion and the other end portion in the form of a nut, said threaded end portion being provided with jet orifices, air guide grooves and a communication groove; a tubular anode member having an insulation body and extending through said main body; a center electrode extending through said insulation body; and a check valve assembly mounted about the intermediate portion between the two end portions of the main body, said valve assembly comprising a ring-shaped valve housing having a tapered seat face and air intake bores and a ring-shaped valve body reciprocally received in said valve housing and having a matingly tapered outer surface for opening and closing said air intake bores in the valve housing.

Abstract translation: 一种用于内燃机的火花塞，其包括具有一个外螺纹端部的中空圆柱形主体和呈螺母形式的另一端部，所述螺纹端部设置有喷射孔，导气槽和连通槽 ; 具有绝缘体并延伸穿过所述主体的管状阳极部件; 延伸穿过所述绝缘体的中心电极; 以及安装在所述主体的两个端部之间的所述中间部分周围的止回阀组件，所述阀组件包括具有锥形座面和进气孔的环形阀壳体和在所述主体中相互接收的环形阀体 阀壳体并且具有配合的锥形外表面，用于打开和关闭阀壳体中的所述进气孔。

公开(公告)号：US4001816A

公开(公告)日：1977-01-04

申请号：US650450

申请日：1976-01-19

Applicant: Kiyoshi Yamada ,  Kazushige Morisue ,  Hiroshi Shimomura ,  Yoshio Imamura

Inventor： Kiyoshi Yamada ,  Kazushige Morisue ,  Hiroshi Shimomura ,  Yoshio Imamura

IPC: G10K15/04 ,  G08B23/00 ,  G10H1/30 ,  G10H5/06 ,  G08B1/00

CPC classification number: G10H5/06 ,  G10H1/30

Abstract: An electronic chime wherein at least two different audible frequency signals forming chime sound are generated by a frequency divider oscillated by an oscillating circuit capable of adjusting its output standard frequency clock pulse. These audible frequency signals are respectively amplitude modulated so as to be attenuated stepwise, and the chime sound is generated by such modulated signals and caused to disappear at attenuated state.

公开(公告)号：US08921706B2

公开(公告)日：2014-12-30

申请号：US13823700

申请日：2010-10-01

Applicant: Mitsuaki Toda ,  Yoshio Imamura ,  Takuya Hasegawa

Inventor： Mitsuaki Toda ,  Yoshio Imamura ,  Takuya Hasegawa

IPC: H05K1/16 ,  H05K1/18 ,  H05K3/32 ,  H05K1/02

CPC classification number: H05K1/182 ,  H05K1/0269 ,  H05K1/188 ,  H05K3/32 ,  H05K2201/09918 ,  H05K2201/10204 ,  H05K2201/10636 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/4913

Abstract: A component-embedded substrate includes an electrically insulating base (11) of resin, an electric or electronic embedded component (8) and a dummy embedded component (7) both embedded in the insulating base (11), a conductor pattern (18) formed on at least one side of the insulating base (11) and connected directly to or indirectly via a connection layer (6) to the embedded component (8) and the dummy embedded component (7), and a mark (10) formed on a surface of the dummy embedded component (7) and used as a reference when the conductor pattern (18) is formed, whereby positional accuracy of the conductor pattern (18) relative to the embedded component (8) can be improved.

Abstract translation: 部件嵌入式基板包括树脂电绝缘基座（11），嵌入在绝缘基座（11）中的电气或电子嵌入式部件（8）和虚拟嵌入部件（7），形成有导体图案（18） 在所述绝缘基体（11）的至少一侧上并且直接连接到所述嵌入部件（8）和所述虚拟嵌入部件（7）的连接层（6）或间接连接，以及形成在所述绝缘基体 并且当形成导体图案（18）时用作参考，从而能够提高导体图案（18）相对于嵌入部件（8）的位置精度。

公开(公告)号：US20140299367A1

公开(公告)日：2014-10-09

申请号：US14355558

申请日：2011-11-08

Applicant: Yoshio Imamura

Inventor： Yoshio Imamura

IPC: H05K13/04 ,  H05K1/18

CPC classification number: H05K13/0469 ,  H01L21/4846 ,  H01L21/568 ,  H01L23/145 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32245 ,  H01L2224/82039 ,  H01L2224/82132 ,  H01L2224/83005 ,  H01L2224/83132 ,  H01L2224/8314 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/14 ,  H05K1/184 ,  H05K1/188 ,  H05K3/007 ,  H05K3/4602 ,  H05K2201/09918 ,  H05K2203/1469 ,  H05K2203/167 ,  Y10T29/49135

Abstract: The method includes forming an annular seat and main marks on a metal layer simultaneously so that the annular seat opposes with a terminal of an electronic component when the component is placed above the annular seat at a subsequent step; then positioning the electronic component in a mounting expected region using the main marks and mounting the electronic component with an adhesive layer therebetween; then burying the electronic component and the main marks in an insulating substrate; then removing part of the metal layer and thereby forming first and second windows; then irradiating the adhesive layer with laser using the exposed main marks thereby forming a laser via hole; and then filling the laser via hole with copper and forming a wiring pattern from the metal layer electrically connected to the terminal through a conductive via.

Abstract translation: 该方法包括在金属层上同时形成环形座和主标记，使得当在随后的步骤中将元件放置在环形座上方时，环形座与电子元件的端子相对; 然后使用主标记将电子部件定位在安装预期区域中，并且在其间具有粘合剂层来安装电子部件; 然后将电子部件和主要标记埋入绝缘基板中; 然后去除金属层的一部分，从而形成第一和第二窗口; 然后使用暴露的主标记用激光照射粘合剂层，从而形成激光通孔; 然后用铜填充激光通孔，并通过导电通孔从与端子电连接的金属层形成布线图案。

公开(公告)号：US09526182B2

公开(公告)日：2016-12-20

申请号：US14355192

申请日：2011-10-31

Applicant: Ryoichi Shimizu ,  Tohru Matsumoto ,  Takuya Hasegawa ,  Yoshio Imamura

Inventor： Ryoichi Shimizu ,  Tohru Matsumoto ,  Takuya Hasegawa ,  Yoshio Imamura

IPC: H05K3/30 ,  H05K3/40 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H01L23/544 ,  H01L23/00 ,  H01L21/683 ,  H05K3/46 ,  H05K3/42 ,  H01L21/56

CPC classification number: H05K3/4038 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/544 ,  H01L24/19 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L2221/68359 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32245 ,  H01L2224/82039 ,  H01L2224/82132 ,  H01L2224/83005 ,  H01L2224/83132 ,  H01L2224/8314 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/14 ,  H05K1/0266 ,  H05K1/0269 ,  H05K1/115 ,  H05K1/118 ,  H05K1/188 ,  H05K3/303 ,  H05K3/421 ,  H05K3/4602 ,  H05K3/4623 ,  H05K3/4652 ,  H05K2201/09063 ,  H05K2201/09918 ,  H05K2203/063 ,  H05K2203/0703 ,  H05K2203/1461 ,  Y02P70/613 ,  Y10T29/49165

Abstract: The method includes positioning an electronic component using main marks formed on a metal layer and mounting the electronic component on a second surface of the metal layer with an adhesive layer interposed between the metal layer and both of the electronic component and terminals; then burying the electronic component and the main marks in an insulating substrate; then removing part of the metal layer and forming a first window for exposing the main marks therefrom and a second window for exposing the adhesive layer including a position corresponding to the terminal therefrom; then using the exposed main marks as references and forming a laser via hole LVH reaching the terminal in the adhesive layer exposed from the second window; and thereby forming a wiring pattern from the metal layer electrically connected to the terminal through a first conductive via formed by plating the LVH with copper.

Abstract translation: 该方法包括使用形成在金属层上的主要标记来定位电子部件，并且将金属层和电子部件和端子两者之间的粘合剂层安装在金属层的第二表面上; 然后将电子部件和主要标记埋入绝缘基板中; 然后去除金属层的一部分并形成用于暴露主要标记的第一窗口和用于暴露粘合剂层的第二窗口，其包括对应于其端子的位置; 然后使用暴露的主标记作为参考，并且形成从第二窗口暴露的粘合剂层中到达端子的激光通孔LVH; 从而通过使LVH与铜电镀而形成的第一导电通孔，从与金属层电连接的金属层形成布线图案。

公开(公告)号：US09320185B2

公开(公告)日：2016-04-19

申请号：US13824437

申请日：2010-10-01

Applicant: Yoshio Imamura ,  Tohru Matsumoto ,  Ryoichi Shimizu

Inventor： Yoshio Imamura ,  Tohru Matsumoto ,  Ryoichi Shimizu

IPC: H05K13/00 ,  H05K1/02 ,  H05K1/18 ,  H05K1/16

CPC classification number: H05K13/00 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/544 ,  H01L2221/68359 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/26175 ,  H01L2224/32245 ,  H01L2224/83005 ,  H01L2224/83132 ,  H05K1/0269 ,  H05K1/16 ,  H05K1/188 ,  H05K2201/09781 ,  H05K2201/09918

Abstract: A thin conductive layer which is to form a conductor pattern (18) is prepared, a mask layer (3) is formed on the conductive layer except a plurality of actual connection spots and at least one dummy connection spot on the conductive layer, actual solder pads (6) and a dummy solder pad (7) are formed, with use of solder, on the actual connection spots and the dummy connection spot, respectively, where the conductive layer is exposed, connection terminals (9) of an electric or electronic component (8) are connected to the actual solder pads (6), an insulating base (16) of resin is formed which is laminated directly on or indirectly via the mask layer (3) on the conductive layer and in which the component (8) is embedded, and part of the conductive layer is removed by using the dummy solder pad (7) as a reference, to form the conductor pattern (18).

Abstract translation: 准备形成导体图案（18）的薄导电层，除了导电层上的多个实际连接点和至少一个虚设连接点之外，在导电层上形成掩模层（3），实际焊料 在导电层暴露的实际连接点和虚拟连接点上，使用焊料形成焊盘（6）和虚拟焊盘（7），电或电子的连接端子（9） 组件（8）连接到实际的焊盘（6），形成树脂的绝缘基底（16），其直接层压在导电层上或通过掩模层（3）间接地层叠，其中部件（8） ），并且通过使用虚拟焊盘（7）作为参考来去除导电层的一部分，以形成导体图案（18）。

公开(公告)号：US20130176701A1

公开(公告)日：2013-07-11

申请号：US13823700

申请日：2010-10-01

Applicant: Mitsuaki Toda ,  Yoshio Imamura ,  Takuya Hasegawa

Inventor： Mitsuaki Toda ,  Yoshio Imamura ,  Takuya Hasegawa

IPC: H05K1/18 ,  H05K3/32

CPC classification number: H05K1/182 ,  H05K1/0269 ,  H05K1/188 ,  H05K3/32 ,  H05K2201/09918 ,  H05K2201/10204 ,  H05K2201/10636 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/4913

Abstract: A component-embedded substrate includes an electrically insulating base (11) of resin, an electric or electronic embedded component (8) and a dummy embedded component (7) both embedded in the insulating base (11), a conductor pattern (18) formed on at least one side of the insulating base (11) and connected directly to or indirectly via a connection layer (6) to the embedded component (8) and the dummy embedded component (7), and a mark (10) formed on a surface of the dummy embedded component (7) and used as a reference when the conductor pattern (18) is formed, whereby positional accuracy of the conductor pattern (18) relative to the embedded component (8) can be improved.

Abstract translation: 部件嵌入式基板包括树脂电绝缘基座（11），嵌入在绝缘基座（11）中的电气或电子嵌入式部件（8）和虚拟嵌入部件（7），形成有导体图案（18） 在所述绝缘基体（11）的至少一侧上并且直接连接到所述嵌入部件（8）和所述虚拟嵌入部件（7）的连接层（6）或间接连接，以及形成在所述绝缘基体 并且当形成导体图案（18）时用作参考，从而能够提高导体图案（18）相对于嵌入部件（8）的位置精度。

公开(公告)号：US5841317A

公开(公告)日：1998-11-24

申请号：US606945

申请日：1996-02-26

Applicant: Tetsurou Ohmori ,  Yoshito Date ,  Takashi Koizumi ,  Yoshio Imamura ,  Osamu Sarai

Inventor： Tetsurou Ohmori ,  Yoshito Date ,  Takashi Koizumi ,  Yoshio Imamura ,  Osamu Sarai

IPC: H03M1/66 ,  H03F1/02 ,  H03F3/30 ,  H03K6/02 ,  H03K17/16 ,  H03K17/687 ,  H03K19/0175 ,  H03F3/45 ,  H03K3/023 ,  H03K17/04

CPC classification number: H03F1/0277 ,  H03F3/3001 ,  H03F2203/30057

Abstract: A differential amplifier achieving a high throughput rate with reduced power consumption includes a differential circuit, output circuit, a constant current source transistor, a drive transistor, and a switching circuit. A difference voltage relative to a difference between voltages applied to non-inverting and inverting inputs of the differential circuit is applied to the switching circuit. The switching circuit supplies a drive signal to the drive transistor to enable the drive transistor when the difference voltage is below a predetermined threshold voltage, and to disable the drive transistor when the difference voltage is above the predetermined threshold voltage.

Abstract translation: 实现具有低功耗的高吞吐率的差分放大器包括差分电路，输出电路，恒流源晶体管，驱动晶体管和开关电路。 相对于施加到差分电路的非反相和反相输入的电压之间的差异电压被施加到开关电路。 切换电路向驱动晶体管提供驱动信号，以便当差值电压低于预定阈值电压时使驱动晶体管能够使能，并且当差值电压高于预定阈值电压时禁止驱动晶体管。