公开(公告)号：US20150102209A1

公开(公告)日：2015-04-16

申请号：US14515376

申请日：2014-10-15

Applicant: ams AG

Inventor： Gonggui XU ,  Andreas FITZI

IPC: G01J1/42 ,  G01J1/46

CPC classification number: G01J1/4204 ,  G01J1/44 ,  G01J1/46 ,  G01J2001/446 ,  H03K17/941

Abstract: An optical sensor arrangement (10) comprises a photodiode (11) for providing a sensor current (IPD) and an analog-to-digital converter arrangement (12) which is coupled to the photodiode (11) and determines a digital value of the sensor current (IPD) in a charge balancing operation in a first phase (A) and in another conversion operation in a second phase (B).

Abstract translation: 光学传感器装置（10）包括用于提供传感器电流（IPD）的光电二极管（11）和耦合到光电二极管（11）的模拟 - 数字转换器装置（12），并确定传感器的数字值 在第一阶段（A）中的电荷平衡操作中的电流（IPD）和在第二阶段（B）中的另一转换操作。

公开(公告)号：US20220094307A1

公开(公告)日：2022-03-24

申请号：US17310333

申请日：2020-01-21

Applicant: ams AG

Inventor： Carlo FIOCCHI ,  Andreas FITZI ,  Andras MOZSARY

IPC: H03F1/32 ,  H03F3/45

Abstract: An amplifier circuit includes a circuit path of serially connected complementary type transistors. First and second feedback loops include a loop amplifier, the transistors of the circuit path and a corresponding resistor.

公开(公告)号：US20170310291A1

公开(公告)日：2017-10-26

申请号：US15521281

申请日：2015-08-20

Applicant: ams AG

Inventor： José Manual Garcia GONZÁLEZ ,  Andreas FITZI

IPC: H03F3/45 ,  H03F1/22

CPC classification number: H03F3/45215 ,  H03F1/14 ,  H03F1/223 ,  H03F3/3022 ,  H03F3/45071 ,  H03F3/45179 ,  H03F3/45183 ,  H03F3/45192 ,  H03F3/45475 ,  H03F2200/411 ,  H03F2200/456 ,  H03F2203/45116 ,  H03F2203/45138 ,  H03F2203/45318

Abstract: An amplifier circuit with a differential input and a differential output comprises a first and a second pair of matched transistors having a first threshold voltage and comprising control terminals connected to the differential input. A first and a second pair of triplets of transistors having a second threshold voltage being different from the first threshold voltage is connected to each one of the pairs of matched transistors such that respective current paths are formed with these transistors. The currents are split up to bias current sources and to an output stage such that the current is reused for implementing a class AB operation. Furthermore, a current through bias transistors connected in the current path of the first and the second pair of matched transistors is mirrored to output transistors being arranged in a differential current path of the output stage.

公开(公告)号：US20170005622A1

公开(公告)日：2017-01-05

申请号：US15100278

申请日：2014-09-25

Applicant: ams AG

Inventor： Andreas FITZI

IPC: H03F1/26 ,  H03F3/45 ,  H03F3/21

CPC classification number: H03F1/26 ,  H03F3/21 ,  H03F3/45183 ,  H03F3/45237 ,  H03F3/45273 ,  H03F2203/45352 ,  H03F2203/45366

Abstract: An amplifier arrangement is presented, comprising a first differential stage (DS1) comprising at least two transistors (M1, M1′) having a first threshold voltage (Vth1), at least a second differential stage (DS2) comprising at least two transistors (M3, M3′) having a second threshold voltage different from the first threshold voltage, at least one of the transistors of the first and second differential stage (DS1, DS2), respectively, has a control input commonly coupled to an input of the amplifier arrangement, at least one transistor (M1) of the first differential stage and one transistor (M3) of the second differential stage are arranged in a common current path, which is coupled to an output of the amplifier arrangement.

Abstract translation: 提供一种放大器装置，包括：第一差分级（DS1），包括具有第一阈值电压（Vth1）的至少两个晶体管（M1，M1'），至少包括至少两个晶体管的M3（M3） ，M3'）具有不同于第一阈值电压的第二阈值电压，第一和第二差分级（DS1，DS2）中的至少一个晶体管分别具有控制输入，该控制输入共同耦合到放大器装置的输入端 ，第一差分级的至少一个晶体管（M1）和第二差分级的一个晶体管（M3）被布置在公共电流路径中，该公共电流路径耦合到放大器装置的输出端。

公开(公告)号：US20190006998A1

公开(公告)日：2019-01-03

申请号：US15780601

申请日：2016-11-08

Applicant: ams AG

Inventor： Matthias STEINER ,  Andreas FITZI

IPC: H03F1/26 ,  H03F3/45 ,  H03F3/00

Abstract: An amplifier arrangement has a first differential stage with a first transistor pair, a second differential stage with a first and a second transistor pair, each pair having a common source connection. The amplifier arrangement further has a first complementary differential stage with a transistor pair having opposite conductivity type, and a second complementary differential stage with a first and a second transistor pair of the complementary conductivity type. The first and the second complementary differential stage are connected symmetrically compared to the first and the second differential stage. The transistors of the second differential stage and the second complementary differential stage are symmetrically connected to form respective first, second, third and fourth current paths. A pair of output terminals is coupled to the first and the fourth current path. Gate terminals of the transistors are coupled to a respective pair of input terminals.

公开(公告)号：US20170077946A1

公开(公告)日：2017-03-16

申请号：US15121753

申请日：2015-02-13

Applicant: ams AG

Inventor： Thomas CHRISTEN ,  Thomas FROEHLICH ,  Andreas FITZI ,  Dusan PRELOG

IPC: H03M3/00

CPC classification number: H03M3/422 ,  H03M3/328 ,  H03M3/334 ,  H03M3/424 ,  H03M3/43 ,  H03M3/436 ,  H03M3/438 ,  H03M3/464

Abstract: A delta-sigma modulator (10) comprises a modulator loop (11) and a code generator (12). The modulator loop (11) comprises a loop filter (18). The code generator (12) is configured to generate a generator signal (BS) that is realized as an extended Barker code. The code generator (12) comprises a generator output (23) that is coupled to the loop filter (18).

Abstract translation: Δ-Σ调制器（10）包括调制器回路（11）和代码发生器（12）。 调制器环路（11）包括环路滤波器（18）。 代码生成器（12）被配置为生成作为扩展巴克码实现的发生器信号（BS）。 代码生成器（12）包括耦合到环路滤波器（18）的发生器输出（23）。