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公开(公告)号:US20220149734A1
公开(公告)日:2022-05-12
申请号:US17511813
申请日:2021-10-27
Applicant: uPI semiconductor corp.
Inventor: Chih-Lien CHANG , Wei-Hsiu HUNG , Chun-Ming LU , Min-Rui LAI
Abstract: A control circuit of a power converter includes a sensing circuit, a ramp signal generation circuit and a PWM circuit. The sensing circuit, coupled to an output circuit, provides a current sensing signal. The ramp signal generation circuit includes a transient circuit and a signal generation circuit. The transient circuit receives the current sensing signal and generates a variable reference voltage. The signal generation circuit provides a ramp signal according to the variable reference voltage. The PWM circuit provides a PWM signal to the output circuit according to the ramp signal. When current sourcing occurs, it continues for a first default time. A transient state during current sourcing continues for a second default time less than first default time. The variable reference voltage is changed from a default value to an adjusted value during the second default time and restored to the default value after the second default time.
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公开(公告)号:US20190296639A1
公开(公告)日:2019-09-26
申请号:US16296454
申请日:2019-03-08
Applicant: uPI semiconductor corp.
Inventor: Chih-Lien CHANG , Pei-Ling HONG , Min-Rui LAI
Abstract: A current mirror calibration circuit, coupled to an error amplifier of a pulse-width modulation controller, includes a first voltage generation unit, a second voltage generation unit, a calibration unit and a current mirror circuit. During an initial period, the first voltage generation unit and second voltage generation unit provide a first default voltage and a second default voltage respectively. The current mirror circuit includes a first current unit and a second current unit. The first current unit receives an original current. The second current unit generates a mirror current having a proportional relationship with original current. The first current unit has a first node coupled to the first voltage generation unit and a second node coupled to a third default voltage. The second current unit has a third node coupled to the second voltage generation unit and calibration unit and a fourth node coupled to calibration unit and an output terminal of error amplifier.
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