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    Metal probe structure and method for fabricating the same
    1.
    发明授权
    Metal probe structure and method for fabricating the same 有权

    公开(公告)号：US11474128B2

    公开(公告)日：2022-10-18

    申请号：US16747557

    申请日：2020-01-21

    Applicant: PRINCO CORP.

    Inventor： Yi-Lin Chu ,  Hung-sheng Ku

    IPC: G01R1/067 ,  G01R31/28 ,  G03F7/42

    Abstract: A metal probe structure and a method for fabricating the same are provided. The metal probe structure includes a multi-layer substrate, a first flexible dielectric layer, a second flexible dielectric layer, and a plurality of first metal components. The first flexible dielectric layer is disposed over the multi-layer substrate and has a conductive layer formed thereover. The second flexible dielectric layer is disposed over the first flexible dielectric layer to cover the conductive layer. The plurality of first metal components is disposed over the conductive layer and partially in the second flexible dielectric layer to serve as a metal probe.

    SURFACE FINISH STRUCTURE OF MULTI-LAYER SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
    2.
    发明申请
    SURFACE FINISH STRUCTURE OF MULTI-LAYER SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 有权

    公开(公告)号：US20220068849A1

    公开(公告)日：2022-03-03

    申请号：US17142271

    申请日：2021-01-06

    Applicant: PRINCO CORP.

    Inventor： Pei-Liang CHIU

    IPC: H01L23/00 ,  H01L23/522 ,  H01L21/768 ,  H01L21/033

    Abstract: A surface finish structure of a multi-layer substrate includes: a dielectric layer; at least one pad layer formed on the dielectric layer or embedded in the dielectric layer; at least one protective metal layer formed on the at least one pad layer and contacting the pad layer, wherein the at least one protective metal layer only covers a top surface of the at least one pad layer, and the at least one protective metal layer is configured to be soldered to or contact an external element; and a solder mask layer formed on the dielectric layer and including at least one opening to expose the at least one protective metal layer. A method for manufacturing a surface finish structure of a multi-layer substrate is also provided.

    Wristwatch and power saving method thereof
    3.
    发明授权
    Wristwatch and power saving method thereof 有权

    公开(公告)号：US11163268B2

    公开(公告)日：2021-11-02

    申请号：US16398328

    申请日：2019-04-30

    Applicant: PRINCO CORP.

    Inventor： Ying-Che Shih

    IPC: G04G21/04 ,  G04G17/08 ,  G04G19/00 ,  G04G21/08 ,  G06F1/16 ,  G06F1/3203 ,  G06K19/07

    Abstract: A wristwatch and a power saving method thereof are provided herein. The wristwatch comprises: a time indicating device, configured to provide time information; a housing, defining a receiving room; a short distance communication module disposed in the receiving room, configured to implement short distance wireless communication with an external device, the communication module comprising: a security element, configured to process user security data; and a first coil, coupled to the security element and configured to transmit electromagnetic signals to communicate with the external device; the wristwatch further comprising: a second coil, coupled to the communication module, configured to sense an external magnetic field to generate a sensing signal, the sensing signal provided for controlling the communication module to be turned on or off to enable or disable transmission of the electromagnetic signals of the first coil. The wristwatch can reduce power consumption.

    MULTI-LAYER SUBSTRATE AND MANUFACTURING METHOD THEREOF
    6.
    发明申请
    MULTI-LAYER SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
    多层基板及其制造方法

    公开(公告)号：US20110198782A1

    公开(公告)日：2011-08-18

    申请号：US13092319

    申请日：2011-04-22

    Applicant: Chih-Kuang Yang ,  Cheng-Yi Chang

    Inventor： Chih-Kuang Yang ,  Cheng-Yi Chang

    IPC: H05K3/10 ,  H05H1/24

    CPC classification number: H05K3/28 ,  H05K3/0058 ,  H05K3/381 ,  H05K3/4682 ,  H05K2201/0154 ,  H05K2203/016 ,  H05K2203/065 ,  H05K2203/0759 ,  H05K2203/095 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

    Abstract: Disclosed are a multi-layer substrate and a manufacturing method of the multi-layer substrate. By employing a carrier to alternately form dielectric layers and metal structure layers thereon. Each dielectric layer adheres with the adjacent dielectric layer to embed the metal structure layers in the dielectric layers corresponding thereto. Comparing with prior arts, which have to use prepregs when hot pressing and adhering different layers of different materials, the present invention takes fewer processes, thus, fewer kinds of materials without using prepregs. Therefore, the present invention can promote the entire quality and yield of manufacturing the multi-layer substrate to satisfy mechanical characteristic matching of the multi-layer substrate and to reduce cost of the whole manufacturing process. Significantly, the multi-layer substrate having thin dielectric layers according to the present invention can satisfy the concern of impedance matching therefore, and can reduce crosstalk influence to keep good signal integrity therein.

    Abstract translation: 公开了多层基板的多层基板和多层基板的制造方法。 通过使用载体交替地在其上形成介电层和金属结构层。 每个电介质层与相邻的电介质层粘合以将金属结构层嵌入与其对应的电介质层中。 与现有技术相比，当热压和粘附不同材料的不同层时，必须使用预浸料，本发明采用较少的工艺，因此在不使用预浸料的情况下，材料种类较少。 因此，本发明可以提高制造多层基板的整体质量和产率，以满足多层基板的机械特性匹配并降低整个制造工艺的成本。 重要的是，根据本发明的具有薄介电层的多层基板因此可以满足阻抗匹配的关注，并且可以减少串扰影响以保持良好的信号完整性。

    VIA STRUCTURE IN MULTI-LAYER SUBSTRATE AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    VIA STRUCTURE IN MULTI-LAYER SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
    通过多层基板的结构及其制造方法

    公开(公告)号：US20100108363A1

    公开(公告)日：2010-05-06

    申请号：US12582647

    申请日：2009-10-20

    Applicant: Chih-kuang Yang

    Inventor： Chih-kuang Yang

    IPC: H01R12/04 ,  H01R43/16

    CPC classification number: H05K1/116 ,  H05K1/0393 ,  H05K1/115 ,  H05K3/048 ,  H05K3/4076 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/09645 ,  H05K2201/09827 ,  Y10T29/49204

    Abstract: Disclosed is a via structure in a multi-layer substrate, comprising a first metal layer, a dielectric layer and a second metal layer. The first metal layer has an upper surface. The dielectric layer covers the first metal layer in which a via is opened to expose the upper surface. The second metal layer is formed in the via and contacts an upper surface and an inclined wall of the via. A contacting surface of the second metal layer has a top line lower than the upper edge of the inclined wall. Alternatively, the second metal layer can be formed on the dielectric layer as being a metal line simultaneously as formed in the via as being a pad. The metal line and the pad are connected electronically. The aforesaid metal second layer can be formed in the via and on the dielectric layer by a metal lift-off process.

    Abstract translation: 公开了一种多层基板中的通孔结构，包括第一金属层，电介质层和第二金属层。 第一金属层具有上表面。 电介质层覆盖第一金属层，其中通孔被打开以暴露上表面。 第二金属层形成在通孔中并与通孔的上表面和倾斜壁接触。 第二金属层的接触表面具有比倾斜壁的上边缘低的顶线。 或者，第二金属层可以作为金属线形成在电介质层上，同时形成在通孔中作为焊盘。 金属线和焊盘以电子方式连接。 上述金属第二层可以通过金属剥离工艺在通孔和电介质层上形成。

    HYBRID STRUCTURE OF MULTI-LAYER SUBSTRATES AND MANUFACTURE METHOD THEREOF
    8.
    发明申请
    HYBRID STRUCTURE OF MULTI-LAYER SUBSTRATES AND MANUFACTURE METHOD THEREOF 有权
    多层基板的混合结构及其制造方法

    公开(公告)号：US20080138575A1

    公开(公告)日：2008-06-12

    申请号：US11856858

    申请日：2007-09-18

    Applicant: Chih-kuang Yang

    Inventor： Chih-kuang Yang

    IPC: B32B3/10 ,  H01R43/00

    CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

    Abstract translation: 多层基板的混合结构包括第一多层基板和第二多层基板。 第一多层基板交替地堆叠第一金属层，第一介电层并具有VIA。 第一金属层的边界区域与相应的第一介电层的边界区域连接。 边界区域与相邻的第一金属层和相邻的第一介电层分离。 第二多层基板交替堆叠第二金属层和第二电介质层。 第二金属层的边界区域与相应的第二电介质层的边界区域连接。 边界区域与相邻的第二金属层和相邻的第二介电层分离。 VIA位于第一电介质层的边界区，并且每个VIA具有导电体，以将一个第一金属层与一个第二金属层连接。

    PAD CONDITIONER FOR CONDITIONING A CMP PAD AND METHOD OF MAKING SUCH A PAD CONDITIONER
    9.
    发明申请
    PAD CONDITIONER FOR CONDITIONING A CMP PAD AND METHOD OF MAKING SUCH A PAD CONDITIONER 审中-公开
    用于调节CMP垫的PAD调节器和制造这种PAD调节器的方法

    公开(公告)号：US20070037493A1

    公开(公告)日：2007-02-15

    申请号：US11163548

    申请日：2005-10-21

    Applicant: Ying-Che Shih

    Inventor： Ying-Che Shih

    IPC: B24B1/00 ,  B24B21/18

    CPC classification number: B24B53/017 ,  B24D18/0027

    Abstract: The invention provides a pad conditioner for conditioning a CMP pad. The pad conditioner includes a substrate, a plurality of cavities on the substrate, a bonding agent filling in the cavities, and a plurality of abrasive particles securely placed and fixed in the cavities separately. The cavities are arranged in a regular manner and each cavity is sized such that it can accommodate only one abrasive particle. The cavities may be bowl-shaped or of other shapes. A method of making such a pad conditioner is also disclosed.

    Abstract translation: 本发明提供一种用于调节CMP垫的垫式调节器。 衬垫调节器包括衬底，衬底上的多个空腔，填充在空腔中的粘合剂，以及分别牢固地放置和固定在空腔中的多个磨料颗粒。 空腔以规则​​的方式布置，并且每个空腔的尺寸使得其仅容纳一个磨料颗粒。 空腔可以是碗状或其他形状。 还公开了制造这种垫式调节器的方法。

    SURFACE FINISH STRUCTURE OF MULTI-LAYER SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
    10.
    发明公开
    SURFACE FINISH STRUCTURE OF MULTI-LAYER SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 审中-公开

    公开(公告)号：US20240047392A1

    公开(公告)日：2024-02-08

    申请号：US18381670

    申请日：2023-10-19

    Applicant: PRINCO CORP.

    Inventor： Pei-Liang CHIU

    IPC: H01L23/00 ,  H01L21/033 ,  H01L21/768 ,  H01L23/522

    CPC classification number: H01L24/05 ,  H01L21/033 ,  H01L21/76841 ,  H01L23/522 ,  H01L23/564

    Abstract: A surface finish structure of a multi-layer substrate includes: a dielectric layer; at least one pad layer formed on the dielectric layer or embedded in the dielectric layer; at least one protective metal layer formed on the at least one pad layer and contacting the pad layer, wherein the at least one protective metal layer only covers a top surface of the at least one pad layer, and the at least one protective metal layer is configured to be soldered to or contact an external element; and a solder mask layer formed on the dielectric layer and including at least one opening to expose the at least one protective metal layer. A method for manufacturing a surface finish structure of a multi-layer substrate is also provided.

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