In a first step, slot synchronization is obtained by setting in correlation (210, 220) the received signal (r) with a primary sequence (SG), which represents the primary channel (PSC), and by storing said received signal. During a second step, the said correlator (210, 220) is re-used for correlating the received signal (r) with a secondary sequence (SSC) corresponding to the secondary synchronization codes. The correlator (210) is preferably structured in the form of a first filter (210) and of a second filter (220) set in series, which receive a first secondary sequence (SG1) and a second secondary sequence (SG2), typically consisting of Golay sequences. Proposed herein are architectures of a parallel and serial type, as well as architectures designed for re-using further circuit parts. A preferential application is in mobile communication systems based upon standards such as UMTS, CDMA2000, IS95, or WBCDMA.