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    Process and device for synchronization and codegroup identification in CDMA cellular communication systens
    1.
    发明公开
    Process and device for synchronization and codegroup identification in CDMA cellular communication systens 有权
    用于CDMA蜂窝通信系统的同步和Kodengruppe的识别的方法和装置

    公开(公告)号：EP1422832A1

    公开(公告)日：2004-05-26

    申请号：EP02425619.0

    申请日：2002-10-11

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pappalardo, Francesco ,  Avellone, Giuseppe ,  Salurso, Elena ,  Galluzzo, Agostino

    IPC: H04B1/707

    CPC classification number: H04B1/70735 ,  H04B1/708 ,  H04B1/7083 ,  H04B2201/70702 ,  H04B2201/70707

    Abstract: To obtain frame synchronization and identify the cell codegroup in a cellular communication system (such as a system based upon the standard 3GPP FDD), there are available the synchronization codes (SSCH) organized in chips or letters transmitted at the beginning of respective slots. Slot synchronization is obtained previously in a first step of the operation of cell search. During a second step, there are acquired, by means of correlation (10) or fast Hadamard transform, the energy values corresponding to the respective individual letters with reference to the possible starting positions of the corresponding frame within the respective slot. Operating in a serial way (24) at the end of acquisition of the aforesaid energy values of the individual letters, or else operating in parallel, the energies of the corresponding words are determined. Of these eneriges only the maximum word-energy value and the information for the corresponding starting position are stored in a memory structure (22). Said maximum value and said starting position identify, respectively, the cell codes and the frame synchronization sought. A preferential application is in mobile communication systems based upon standards such as UMTS, CDMA2000, IS95, or WBCDMA.

    Abstract translation: 以获得帧同步并识别在蜂窝通信系统中的小区的代码组（搜索作为基于标准的3GPP FDD系统），存在可在芯片或字母反式组织的同步码（SSCH）在respectivement槽的开端mitted。 时隙同步在小区搜索的手术的第一步先前获得的。 在第二步骤期间，存在被获取，通过相关性（10）的装置或几乎阿达玛变换，该能量值对应于与参考respectivement时隙内的对应的帧的可能的开始位置的respectivement单个字母。 在采集单个字母的上述能量值的所述端以串行方式（24）操作时，或者在并行操作中，对应的字的能量是确定性的开采。 论文eneriges的唯一的最大字能量值和相应的起始位置的信息被存储在存储器结构（22）。 所述最大值和所述起始位置确定，分别为小区的代码以及所寻求的帧同步。 以优惠的应用是在基于标准的移动通信系统：诸如UMTS，CDMA2000，IS95，WBCDMA码或。

    A process for generating codes for CDMA communications, system and computer program
    2.
    发明公开
    A process for generating codes for CDMA communications, system and computer program 有权
    Verfahren，系统与计算机程序zur Erzeugung von CodesfürCDMA-Nachrichtenübertragung

    公开(公告)号：EP1343265A1

    公开(公告)日：2003-09-10

    申请号：EP02425130.8

    申请日：2002-03-07

    Applicant: STMicroelectronics S.r.l.

    Inventor： Loiacono, Daniele ,  Messina, Ettore ,  Avellone, Giuseppe ,  Galluzzo, Agostino

    IPC: H04J13/02

    CPC classification number: H04J13/105 ,  H04J13/0025

    Abstract: In order to generate the main scrambling code of order N and the secondary scrambling code of order K within the set identified by the primary scrambling code of order N, a first m-sequence and a second m-sequence are generated using Fibonacci linear feedback shift registers (LFSRs). Then said first m-sequence and said second m-sequence are modulo-2 added so as to form the I branch of said primary scrambling code. A first T-bit masking word and a second T-bit masking word of rank 0 (X0-MASK, Y0-MASK) are generated that correspond to the polynomial time shifts (X0 (D), Y0 (D)), and the intermediate taps of the X and y registers respectively chosen by means of said masking words (X0-MASK, Y0-MASK) are modulo-2 added so as to generate a third sequence and a fourth sequence which are modulo-2 added together to form the Q branch of said primary scrambling code. With the choice, starting from the least significant Kmax bits of the register X, of the K-th intermediate tap corresponding to the secondary scrambling code of order K within said set identified by the primary scrambling code of order N, a fifth sequence is generated, which, modulo-2 added to said second sequence, forms the I branch of said secondary scrambling code. By modulo-2 summing the intermediate taps of the register X masked by means of the aforesaid first masking word of rank N (XN-MASK), a sixth sequence is generated, which, modulo-2 added to the aforesaid fourth sequence, forms the Q branch of the secondary scrambling code.

    Abstract translation: 为了产生N阶的主扰码和由次序N的主扰码识别的集合内的次序K的次扰码，使用斐波纳契线性反馈移位生成第一m序列和第二m序列 寄存器（LFSR）。 然后，所述第一m序列和所述第二m序列被加模，以便形成所述主扰码的I分支。 生成对应于多项式时移（X0（D），Y0（D））的第0个（X0-MASK，Y0-MASK）的第一T位屏蔽字和第二T位屏蔽字， 分别通过所述掩蔽字（X0-MASK，Y0-MASK）选择的X和Y寄存器的中间抽头被加模，以便产生模2加在一起形成的第三序列和第四序列 所述主扰码的Q分支。 通过选择，从寄存器X的最低有效Kmax位开始，对应于由次序N的主扰码识别的所述集合内的次序K的次级扰频码的第K个中间抽头，产生第五个序列 ，其中添加到所述第二序列的模2形成所述辅助扰码的I分支。 通过模2对由N（XN-MASK）的上述第一掩蔽字掩蔽的寄存器X的中间抽头进行求和，产生第六序列，其中加上前述第四序列的模2形成 Q分支的二次扰码。

    Method and system for resolving the acquisition ambiguity and the problem of false lock in tracking BOC(n, n) modulated signals, particularly for satellite positioning/navigation systems
    4.
    发明公开
    Method and system for resolving the acquisition ambiguity and the problem of false lock in tracking BOC(n, n) modulated signals, particularly for satellite positioning/navigation systems 有权
    方法和系统，用于解决假Akquisitionsmehrdeutigkeit的问题和BOC（N，N）的跟踪期间捕捉-modulated信号，特别是用于卫星定位/导航系统

    公开(公告)号：EP1933469A1

    公开(公告)日：2008-06-18

    申请号：EP06425828.8

    申请日：2006-12-12

    Applicant: STMicroelectronics S.r.l.

    Inventor： Avellone, Giuseppe ,  Frazzetto, Maristella ,  Messina, Ettore

    IPC: H04B1/707 ,  G01S1/00

    CPC classification number: G01S19/30 ,  H04B1/7075 ,  H04B1/7085

    Abstract: A method and a system for the acquisition and tracking of BOC (n,n) modulated codes are described, in which a correlation function is locally generated at a receiver terminal using a code w a according to the relationship w a ( τ )   =   c ( τ n ) -   a ⋅ prn ⁢ τ n   + T c    ̸ 2 -   prn   τ n -   T c  ̸ 2
    wherein c(τ) is a local replica of the BOC modulated pseudo-random noise code with delay τ n , prn(τ) is a replica of a unmodulated pseudo-random noise code, and a is a predeterminable weight coefficient.
    Said correlation function is used in an acquisition test function according to the formula x BOC ( n ) - a ⋅ x BOC ⁢ / PRN ( n + 1 ) - x BOC / PRN ⁢ n - 1 2
    wherein x BOC is the autocorrelation function of the BOC modulated pseudo-random noise code acquired, and x BOC/PRN is the cross correlation function between said acquired BOC modulated pseudo-random noise code and the early and late local replica of the unmodulated pseudo-random noise code, respectively. Said test function is used to recognize a code acquisition, if a value of said test function is higher than a predetermined threshold.

    Abstract translation: 一种方法，以及用于调制码被描述的BOC（N，N）的捕获和跟踪，其中的相关函数是在接收器终端使用的码WA雅丁到关系WA（A）€‰=€本地产生的系统 ‰C（正） - €‰一个

    Method and system for phase recovery and decoding
    6.
    发明公开
    Method and system for phase recovery and decoding 有权
    Verfahren und System zurPhasenrückgewinnungund Dekodierung

    公开(公告)号：EP1524772A1

    公开(公告)日：2005-04-20

    申请号：EP03425662.8

    申请日：2003-10-13

    Applicant: STMicroelectronics S.r.l.

    Inventor： Visalli, Giuseppe ,  Pappalardo, Francesco ,  Avellone, Giuseppe ,  Rimi, Francesco ,  Galluzzo, Agostino

    IPC: H03M13/25 ,  H04L27/233

    CPC classification number: H04L1/0059 ,  H03M13/256 ,  H04L1/0054 ,  H04L1/0068 ,  H04L25/067 ,  H04L27/2272 ,  H04L2027/0055 ,  H04L2027/0067

    Abstract: A phase recovery and decoding method for decoding signals (S'(t)) comprising encoded symbols (u k ) over a respective symbol interval (T) which modulate a carrier, for example in a TCM system. The method envisages performing (20 to 26) a phase locking of the signal to be decoded so as to obtain a phase-locked signal which can present, during each symbol interval (T), variations induced by disturbances (noise, fading, etc.). The value attributed to the decoded symbol (U k ) is a function of the value assumed by the phase-locked signal on at least one subinterval of the symbol interval (T), for example located at the end of the symbol interval (T). Alternatively, the value assumed by the phase-locked signal on a plurality of subintervals comprised in each symbol interval (T) is detected (24,32), and a respective majority value of said phase-locked signal within said plurality of subintervals is identified (34,36). A suitable phase recovery and decoding circuit comprises a phase comparator (20), hard decision means (24), an encoder circuit (26), an oscillator (22) and a selection unit (28). For determining decoded value (U k ) and updating the state of the encoder circuit.

    Abstract translation: 一种相位恢复和解码方法，用于在例如在TCM系统中调制载波的相应符号间隔（T）上对包括编码符号（uk）的信号（S'（t））进行解码。 该方法设想对待解码的信号执行（20至26）相位锁定，以获得在每个符号间隔（T）期间可能存在由干扰（噪声，衰落等）引起的变化的锁相信号。 ）。 归因于解码符号（Uk）的值是在符号间隔（T）的至少一个子间隔（例如位于符号间隔（T）的结尾）处由锁相信号假设的值的函数。 或者，检测包括在每个符号间隔（T）中的多个子间隔上的锁相信号所假设的值（24,32），并且识别所述多​​个子区间内的所述锁相信号的相应多数值 （34,36）。 合适的相位恢复和解码电路包括相位比较器（20），硬判决装置（24），编码器电路（26），振荡器（22）和选择单元（28）。 用于确定解码值（Uk）并更新编码器电路的状态。

    Process and device for synchronization and codegroup identification
    7.
    发明公开
    Process and device for synchronization and codegroup identification 有权
    用于同步和代码组标识的过程和设备

    公开(公告)号：EP1443669A1

    公开(公告)日：2004-08-04

    申请号：EP03425058.9

    申请日：2003-01-31

    Applicant: STMicroelectronics S.r.l.

    Inventor： Rimi, Francesco ,  Avellone, Giuseppe ,  Pappalardo, Francesco ,  Speziali, Filippo ,  Galluzzo, Agostino

    IPC: H04B1/707 ,  H04B7/26

    CPC classification number: H04B1/70735 ,  H04B1/7083 ,  H04B1/709 ,  H04B2201/70707

    Abstract: In a first step, slot synchronization is obtained by setting in correlation (210, 220) the received signal (r) with a primary sequence (SG), which represents the primary channel (PSC), and by storing said received signal. During a second step, the said correlator (210, 220) is re-used for correlating the received signal (r) with a secondary sequence (SSC) corresponding to the secondary synchronization codes. The correlator (210) is preferably structured in the form of a first filter (210) and of a second filter (220) set in series, which receive a first secondary sequence (SG1) and a second secondary sequence (SG2), typically consisting of Golay sequences. Proposed herein are architectures of a parallel and serial type, as well as architectures designed for re-using further circuit parts. A preferential application is in mobile communication systems based upon standards such as UMTS, CDMA2000, IS95, or WBCDMA.

    Abstract translation: 在第一步骤中，通过将接收信号（r）与表示主信道（PSC）的主序列（SG）相关联（210,220）并存储所述接收信号来获得时隙同步。 在第二步骤期间，所述相关器（210,220）被重新用于使接收信号（r）与对应于辅同步码的辅助序列（SSC）相关。 相关器（210）优选地被构造成串联设置的第一滤波器（210）和第二滤波器（220）的形式，其接收第一次级序列（SG1）和第二次级序列（SG2），典型地由 Golay序列。 这里提出的是并行和串行类型的体系结构，以及为重新使用更多电路部分而设计的体系结构。 优先应用在基于诸如UMTS，CDMA2000，IS95或WBCDMA的标准的移动通信系统中。

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