Invention Grant
- Patent Title: Method for determining the parameters of an IC manufacturing process model
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Application No.: US15327330Application Date: 2015-07-30
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Publication No.: US10295912B2Publication Date: 2019-05-21
- Inventor: Mohamed Saib , Patrick Schiavone , Thiago Figueiro
- Applicant: ASELTA NANOGRAPHICS
- Applicant Address: FR Grenoble
- Assignee: ASELTA NANOGRAPHICS
- Current Assignee: ASELTA NANOGRAPHICS
- Current Assignee Address: FR Grenoble
- Agency: Baker & Hostetler LLP
- Priority: EP14306241 20140805
- International Application: PCT/EP2015/067535 WO 20150730
- International Announcement: WO2016/020264 WO 20160211
- Main IPC: G03F7/20
- IPC: G03F7/20 ; G03F1/36 ; H01J37/317 ; H01J37/302 ; G03F1/26

Abstract:
An IC manufacturing model is disclosed, wherein input variables and an output variable are measured using a calibration set of patterns. The model can or cannot include a PSF. The output variable may be a dimensional bias between printed patterns and target patterns or simulated patterns. It can also be a Threshold To Meet Experiments. The input variables may be defined by a metric which uses kernel functions, preferably with a deformation function which includes a shift angle and a convolution procedure. A functional or associative relationship between the input variables and the output variable is defined. Preferably this definition includes normalization steps and interpolation steps. Advantageously, the interpolation step is of the kriging type. The invention achieves a much more accurate modeling of IC manufacturing, simulation or inspection processes.
Public/Granted literature
- US20170168401A1 METHOD FOR DETERMINING THE PARAMETERS OF AN IC MANUFACTURING PROCESS MODEL Public/Granted day:2017-06-15
Information query
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