Invention Grant
- Patent Title: Method to reduce write responses to improve bandwidth and efficiency
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Application No.: US15807151Application Date: 2017-11-08
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Publication No.: US10684965B2Publication Date: 2020-06-16
- Inventor: Vydhyanathan Kalyanasundharam , Amit P. Apte , Chen-Ping Yang
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Kowert Hood Munyon Rankin and Goetzel PC
- Agent Rory D. Rankin
- Main IPC: G06F13/16
- IPC: G06F13/16 ; G06F13/30 ; G06F13/42

Abstract:
Systems, apparatuses, and methods for routing traffic between clients and system memory are disclosed. A computing system includes system memory and one or more clients, each capable of generating memory access requests. The computing system also includes a communication fabric for transferring traffic between the clients and the system memory. The fabric includes master units for interfacing with clients and grouping write requests with a same target together. The fabric also includes slave units for interfacing with memory controllers and for sending a single write response when each write request in a group has been serviced. When the master unit receives the single write response for the group, it sends a respective acknowledgment response for each of the multiple write requests in the group to clients that generated the multiple write requests.
Public/Granted literature
- US20190138465A1 METHOD TO REDUCE WRITE RESPONSES TO IMPROVE BANDWIDTH AND EFFICIENCY Public/Granted day:2019-05-09
Information query