Invention Grant
- Patent Title: Plurality of transistor packages with exposed source and drain contacts mounted on a carrier
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Application No.: US16845304Application Date: 2020-04-10
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Publication No.: US11600558B2Publication Date: 2023-03-07
- Inventor: Tomasz Naeve , Ralf Otremba , Thorsten Scharf , Markus Dinkel , Martin Gruber , Elvir Kahrimanovic
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: DE102019109746.0 20190412,DE102020106492.6 20200310
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/00 ; H01L23/495 ; H01L23/31 ; H01L21/48 ; H01L21/56 ; H01L25/065 ; H02P27/06

Abstract:
A chip package is provided. The chip package includes a semiconductor chip having on a front side a first connecting pad and a second connecting pad, a carrier having a pad contact area and a recess, encapsulation material encapsulating the conductor chip, a first external connection that is free from or extends out of the encapsulation material, an electrically conductive clip, and a contact structure. The semiconductor chip is arranged with its front side facing the carrier with the first connecting pad over the recess and with the second connecting pad contacting the pad contact area. The clip is arranged over a back side of the semiconductor chip covering the semiconductor chip where it extends over the recess. The electrically conductive contact structure electrically conductively connects the first connecting pad with the first external connection.
Public/Granted literature
Information query
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