Invention Grant
- Patent Title: Interconnect architecture with silicon interposer and EMIB
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Application No.: US18079753Application Date: 2022-12-12
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Publication No.: US11901299B2Publication Date: 2024-02-13
- Inventor: Md Altaf Hossain , Ankireddy Nalamalpu , Dheeraj Subbareddy , Robert Sankman , Ravindranath V. Mahajan , Debendra Mallik , Ram S. Viswanath , Sandeep B. Sane , Sriram Srinivasan , Rajat Agarwal , Aravind Dasu , Scott Weber , Ravi Gutala
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L25/18 ; H01L23/00 ; H01L23/48

Abstract:
Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises, a package substrate, an interposer on the package substrate, a first die cube and a second die cube on the interposer, wherein the interposer includes conductive traces for electrically coupling the first die cube to the second die cube, a die on the package substrate, and an embedded multi-die interconnect bridge (EMIB) in the package substrate, wherein the EMIB electrically couples the interposer to the die.
Information query
IPC分类: