Invention Application
- Patent Title: FULL ADDER CELL WITH IMPROVED POWER EFFICIENCY
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Application No.: US16803795Application Date: 2020-02-27
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Publication No.: US20210124558A1Publication Date: 2021-04-29
- Inventor: Ilyas Elkin , Ge Yang , Xi Zhang
- Applicant: NVIDIA Corp.
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corp.
- Current Assignee: NVIDIA Corp.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06F7/501
- IPC: G06F7/501 ; G06F7/575 ; G06F9/30
Abstract:
An adder circuit provides a first operand input and a second operand input to an XNOR cell. The XNOR cell transforms these inputs to a propagate signal that is applied to an OAT cell to produce a carry out signal. A third OAT cell transforms a third operand input and the propagate signal into a sum output signal.
Public/Granted literature
- US11169779B2 Full adder cell with improved power efficiency Public/Granted day:2021-11-09
Information query
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