FULL ADDER CELL WITH IMPROVED POWER EFFICIENCY

    公开(公告)号:US20210124559A1

    公开(公告)日:2021-04-29

    申请号:US16661888

    申请日:2019-10-23

    Applicant: NVIDIA Corp.

    Abstract: This disclosure relates to an adder circuit. The adder circuit comprises an operand input and a second operand input to an XNOR cell. The XNOR cell may be configured to provide the operand input and the second operand input to both a NAND gate and a first OAI cell. A second OAI cell may transform the output of the XNOR cell into a carry out signal.

Patent Agency Ranking