Invention Grant
- Patent Title: Integrated circuit package configurations to reduce stiffness
- Patent Title (中): 集成电路封装配置,以减少刚度
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Application No.: US14189938Application Date: 2014-02-25
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Publication No.: US09397019B2Publication Date: 2016-07-19
- Inventor: Sven Albers , Sonja Koller , Thorsten Meyer , Georg Seidemann , Christian Geissler , Andreas Wolter
- Applicant: INTEL IP CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel IP Corporation
- Current Assignee: Intel IP Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L23/31 ; H01L23/00

Abstract:
Embodiments of the present disclosure are directed towards an integrated circuit (IC) package including a die having a first side and a second side disposed opposite to the first side. The IC package may further include an encapsulation material encapsulating at least a portion of the die and having a first surface that is adjacent to the first side of the die and a second surface disposed opposite to the first surface. In embodiments, the second surface may be shaped such that one or more cross-section areas of the IC package are thinner than one or more other cross-section areas of the IC package. Other embodiments may be described and/or claimed.
Public/Granted literature
- US20150243572A1 INTEGRATED CIRCUIT PACKAGE CONFIGURATIONS TO REDUCE STIFFNESS Public/Granted day:2015-08-27
Information query
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