公开(公告)号：CA2026768A1

公开(公告)日：1991-05-14

申请号：CA2026768

申请日：1990-10-02

Applicant: IBM

Inventor： PADGETT RUSSELL S ,  CHISHOLM DOUGLAS R ,  GARCIA SERAFIN J E JR ,  ALVAREZ RAFAEL ,  KALMAN DEAN A ,  YODER ROBERT D

IPC: G06F12/06 ,  G06F12/02 ,  G06F13/16

Abstract: A selected address within one of two segments of a memory space (124) of a second address/data bus (116), can be accessed from a first bus (102) through one of two data registers (136 and 138). In addition, the location of the two segments within the memory space of the second bus is selectable through two segment registers (148 and 150), which are accessed from the first bus through the first data register (136). A two byte wide "mode" register (126 and 128), which can be directly accessed from the first bus, stores data within three ranges. When the mode register data is within the first range, a selected segment register can be accessed through the first data register. A first value within this range selects the first segment register (148), while a second value selects the second segment register (150). Data loaded into the first and second segment registers points to first and second segments of the second memory space, respectively. When the mode register data is within the second range, this data functions as a pointer to select an address within a selected segment. The selected address is accessed through the data registers; the first data register (136) accessing the selected address in the first segment, while the second data register (138) accesses the selected address in the second segment. After a selected address has been accessed, an auto-increment circuit increments the mode register so that the next sequential address in the selected segment can be accessed without having to reload the mode register. When the mode register data is within the third range, the two data registers can be directly accessed from the first bus.

公开(公告)号：DE69025268T2

公开(公告)日：1996-08-08

申请号：DE69025268

申请日：1990-11-08

Applicant: IBM

Inventor： PADGETT RUSSELL STEPHEN ,  CHISHOLM DOUGLAS RODERICK ,  GARCIA SERAFIN JOSE ELEAZAR ,  ALVAREZ RAFAEL ,  KALMAN DEAN ALAN ,  YODER ROBERT DEAN

IPC: G06F12/06 ,  G06F12/02 ,  G06F13/16

Abstract: A selected address within one of two segments of a memory space (124) of a second address/data bus (116), can be accessed from a first bus (102) through one of two data registers (136 and 138). In addition, the location of the two segments within the memory space of the second bus is selectable through two segment registers (148 and 150), which are accessed from the first bus through the first data register (136). A two byte wide "mode" register (126 and 128), which can be directly accessed from the first bus, stores data within three ranges. When the mode register data is within the first range, a selected segment register can be accessed through the first data register. A first value within this range selects the first segment register (148), while a second value selects the second segment register (150). Data loaded into the first and second segment registers points to first and second segments of the second memory space, respectively. When the mode register data is within the second range, this data functions as a pointer to select an address within a selected segment. The selected address is accessed through the data registers; the first data register (136) accessing the selected address in the first segment, while the second data register (138) accesses the selected address in the second segment. After a selected address has been accessed, an auto-increment circuit increments the mode register so that the next sequential address in the selected segment can be accessed without having to reload the mode register. When the mode register data is within the third range, the two data registers can be directly accessed from the first bus.

公开(公告)号：BR9005633A

公开(公告)日：1991-09-17

申请号：BR9005633

申请日：1990-11-07

Applicant: IBM

Inventor： PADGETT RUSSEL S ,  CHISHOLM DOUGLAS R ,  GARCIA SERAFIN JOSE E JR ,  ALVAREZ RAFAEL ,  KALMAN DEAL A ,  YODER ROBERT D

IPC: G06F12/06 ,  G06F12/02 ,  G06F13/16 ,  G06F13/14

Abstract: A selected address within one of two segments of a memory space (124) of a second address/data bus (116), can be accessed from a first bus (102) through one of two data registers (136 and 138). In addition, the location of the two segments within the memory space of the second bus is selectable through two segment registers (148 and 150), which are accessed from the first bus through the first data register (136). A two byte wide "mode" register (126 and 128), which can be directly accessed from the first bus, stores data within three ranges. When the mode register data is within the first range, a selected segment register can be accessed through the first data register. A first value within this range selects the first segment register (148), while a second value selects the second segment register (150). Data loaded into the first and second segment registers points to first and second segments of the second memory space, respectively. When the mode register data is within the second range, this data functions as a pointer to select an address within a selected segment. The selected address is accessed through the data registers; the first data register (136) accessing the selected address in the first segment, while the second data register (138) accesses the selected address in the second segment. After a selected address has been accessed, an auto-increment circuit increments the mode register so that the next sequential address in the selected segment can be accessed without having to reload the mode register. When the mode register data is within the third range, the two data registers can be directly accessed from the first bus.

公开(公告)号：HK71796A

公开(公告)日：1996-05-03

申请号：HK71796

申请日：1996-04-25

Applicant: IBM

Inventor： PADGETT RUSSELL STEPHEN ,  CHISHOLM DOUGLAS RODERICK ,  GARCIA SERAFIN JOSE ELEAZAR JR ,  ALVAREZ RAFAEL ,  KAIMAN DEAN ALAN ,  YODER ROBERT DEAN

IPC: G06F12/02 ,  G06F13/16 ,  G06F12/06

Abstract: A selected address within one of two segments of a memory space (124) of a second address/data bus (116), can be accessed from a first bus (102) through one of two data registers (136 and 138). In addition, the location of the two segments within the memory space of the second bus is selectable through two segment registers (148 and 150), which are accessed from the first bus through the first data register (136). A two byte wide "mode" register (126 and 128), which can be directly accessed from the first bus, stores data within three ranges. When the mode register data is within the first range, a selected segment register can be accessed through the first data register. A first value within this range selects the first segment register (148), while a second value selects the second segment register (150). Data loaded into the first and second segment registers points to first and second segments of the second memory space, respectively. When the mode register data is within the second range, this data functions as a pointer to select an address within a selected segment. The selected address is accessed through the data registers; the first data register (136) accessing the selected address in the first segment, while the second data register (138) accesses the selected address in the second segment. After a selected address has been accessed, an auto-increment circuit increments the mode register so that the next sequential address in the selected segment can be accessed without having to reload the mode register. When the mode register data is within the third range, the two data registers can be directly accessed from the first bus.

公开(公告)号：AU6455790A

公开(公告)日：1991-05-16

申请号：AU6455790

申请日：1990-10-15

Applicant: IBM

Inventor： PADGETT RUSSELL STEPHEN ,  CHISHOLM DOUGLAS RODERICK ,  GARCIA SERAFIN JOSE ELEAZAR JR ,  ALVAREZ RAFAEL ,  KALMAN DEAN ALAN ,  YODER ROBERT DEAN

IPC: G06F12/06 ,  G06F12/02 ,  G06F13/16 ,  G06F12/04

Abstract: A selected address within one of two segments of a memory space (124) of a second address/data bus (116), can be accessed from a first bus (102) through one of two data registers (136 and 138). In addition, the location of the two segments within the memory space of the second bus is selectable through two segment registers (148 and 150), which are accessed from the first bus through the first data register (136). A two byte wide "mode" register (126 and 128), which can be directly accessed from the first bus, stores data within three ranges. When the mode register data is within the first range, a selected segment register can be accessed through the first data register. A first value within this range selects the first segment register (148), while a second value selects the second segment register (150). Data loaded into the first and second segment registers points to first and second segments of the second memory space, respectively. When the mode register data is within the second range, this data functions as a pointer to select an address within a selected segment. The selected address is accessed through the data registers; the first data register (136) accessing the selected address in the first segment, while the second data register (138) accesses the selected address in the second segment. After a selected address has been accessed, an auto-increment circuit increments the mode register so that the next sequential address in the selected segment can be accessed without having to reload the mode register. When the mode register data is within the third range, the two data registers can be directly accessed from the first bus.

公开(公告)号：IN179860B

公开(公告)日：1997-12-27

申请号：IN903MA1994

申请日：1994-09-15

Applicant: IBM

Inventor： PADGETT RUSSELL STEPHEN ,  CHISHOLM DOUGLAS RODERICK ,  SERAFIN JOSE ELEAZAR GARCIA JR ,  ALVAREZ RAFAEL ,  KALMAN DEAN ALAN ,  YODER ROBERT DEAN

IPC: G06F3/00 ,  G06F12/06

公开(公告)号：IN178635B

公开(公告)日：1997-05-24

申请号：IN759MA1990

申请日：1990-09-25

Applicant: IBM

Inventor： GARCIA SERAFIN JOSE ELEAZAR JR ,  PADGETT RUSSELL STEPHEN ,  CHISHOLM DOUGLAS RODERICK ,  ALVAREZ RAFAEL ,  KALMAN DEAN ALAN ,  YODER ROBERT DEAN

IPC: G06F3/00 ,  G06F12/06

公开(公告)号：SG44428A1

公开(公告)日：1997-12-19

申请号：SG1996000353

申请日：1990-11-08

Applicant: IBM

Inventor： PADGGETT RUSSELL STEPHEN ,  CHISHOLM DOUGLAS RODERICK ,  ELEAZAR GARCIA SERAFIN JOSE JR ,  ALVAREZ RAFAEL ,  KALMAN DEAN ALAN ,  YODER ROBERT DEAN

IPC: G06F12/02 ,  G06F13/16 ,  G06F12/06

Abstract: A selected address within one of two segments of a memory space (124) of a second address/data bus (116), can be accessed from a first bus (102) through one of two data registers (136 and 138). In addition, the location of the two segments within the memory space of the second bus is selectable through two segment registers (148 and 150), which are accessed from the first bus through the first data register (136). A two byte wide "mode" register (126 and 128), which can be directly accessed from the first bus, stores data within three ranges. When the mode register data is within the first range, a selected segment register can be accessed through the first data register. A first value within this range selects the first segment register (148), while a second value selects the second segment register (150). Data loaded into the first and second segment registers points to first and second segments of the second memory space, respectively. When the mode register data is within the second range, this data functions as a pointer to select an address within a selected segment. The selected address is accessed through the data registers; the first data register (136) accessing the selected address in the first segment, while the second data register (138) accesses the selected address in the second segment. After a selected address has been accessed, an auto-increment circuit increments the mode register so that the next sequential address in the selected segment can be accessed without having to reload the mode register. When the mode register data is within the third range, the two data registers can be directly accessed from the first bus.

公开(公告)号：CA2026768C

公开(公告)日：1996-07-23

申请号：CA2026768

申请日：1990-10-02

Applicant: IBM

Inventor： PADGETT RUSSELL S ,  CHISHOLM DOUGLAS R ,  GARCIA SERAFIN J E JR ,  ALVAREZ RAFAEL ,  KALMAN DEAN A ,  YODER ROBERT D

IPC: G06F12/06 ,  G06F12/02 ,  G06F13/16

Abstract: A selected address within one of two segments of a memory space of a second address/data bus, can be accessed from a first bus through one of two data registers. In addition, the location of the two segments within the memory space of the second bus is selectable through two segment registers, which are accessed from the first bus through the first data register. A two byte wide "mode" register, which can be directly accessed from the first bus, stores data within three ranges. When the mode register data is within the first range, a selected segment register can be accessed through the first data register. A first value within this range selects the first segment register, while a second value selects the second segment register. Data loaded into the first and second segment registers points to first and second segments of the second memory space, respectively. When the mode register data is within the second range, this data functions as a pointer to select an address within a selected segment. The selected address is accessed through the data registers; the first data register accessing the selected address in the first segment, while the second data register accesses the selected address in the second segment. After a selected address has been accessed, an auto-increment circuit increments the mode register so that the next sequential address in the selected segment can be accessed without having to reload the mode register. When the mode register data is within the first range, the two data registers can be directly accessed from the first bus.

公开(公告)号：DE69025268D1

公开(公告)日：1996-03-21

申请号：DE69025268

申请日：1990-11-08

Applicant: IBM

Inventor： PADGETT RUSSELL STEPHEN ,  CHISHOLM DOUGLAS RODERICK ,  GARCIA SERAFIN JOSE ELEAZAR ,  ALVAREZ RAFAEL ,  KALMAN DEAN ALAN ,  YODER ROBERT DEAN

IPC: G06F12/06 ,  G06F12/02 ,  G06F13/16

Abstract: A selected address within one of two segments of a memory space (124) of a second address/data bus (116), can be accessed from a first bus (102) through one of two data registers (136 and 138). In addition, the location of the two segments within the memory space of the second bus is selectable through two segment registers (148 and 150), which are accessed from the first bus through the first data register (136). A two byte wide "mode" register (126 and 128), which can be directly accessed from the first bus, stores data within three ranges. When the mode register data is within the first range, a selected segment register can be accessed through the first data register. A first value within this range selects the first segment register (148), while a second value selects the second segment register (150). Data loaded into the first and second segment registers points to first and second segments of the second memory space, respectively. When the mode register data is within the second range, this data functions as a pointer to select an address within a selected segment. The selected address is accessed through the data registers; the first data register (136) accessing the selected address in the first segment, while the second data register (138) accesses the selected address in the second segment. After a selected address has been accessed, an auto-increment circuit increments the mode register so that the next sequential address in the selected segment can be accessed without having to reload the mode register. When the mode register data is within the third range, the two data registers can be directly accessed from the first bus.