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    3.
    发明专利
    未知

    公开(公告)号：DE2448050A1

    公开(公告)日：1975-05-07

    申请号：DE2448050

    申请日：1974-10-09

    Applicant: IBM

    Inventor： HERRELL DENNIS JAMES

    IPC: H01L39/22 ,  H03K19/195

    Abstract: A Josephson tunnelling device with means for producing magnetic fields which intercept the device. These fields establish screening currents in the device. The field producing means includes means for establishing a substantially 1:1 distribution of gate current through the device and the screening current. A particular embodiment is a Josephson logic gate having multiple control lines shaped to insure that current in each control line has the same effect on the junction as current in every other control line. Superconducting layers forming a Josephson tunnel device are sufficiently long to allow the gate currents and screening currents to spread evenly across the width of the Josephson junction.

    JOSEPHSON LOGIC CIFCUIT POWERING ARRANGEMENT
    4.
    发明专利
    JOSEPHSON LOGIC CIFCUIT POWERING ARRANGEMENT 未知

    公开(公告)号：AU2176377A

    公开(公告)日：1978-08-03

    申请号：AU2176377

    申请日：1977-01-28

    Applicant: IBM

    Inventor： HERRELL DENNIS JAMES ,  FANG FRANK FU

    IPC: G11C19/32 ,  G05F3/02 ,  G11C11/44 ,  H03K17/92 ,  H03K19/00 ,  H03K19/195 ,  H01L39/22 ,  H03K23/24

    Abstract: An alternating current powering arrangement for use with Josephson junction devices which have bilateral gain characteristics is disclosed. Using an alternating current input to a Josephson junction logic circuit, it is possible to carry out a desired binary logic function during one half of an alternating current cycle; reset the logic circuit; and carry out a different binary logic function during the second half of the alternating current cycle. In the instance of latching circuits, the Josephson junction logic circuits are reset by the passage of the alternating current (which is normally the gate current of the Josephson junction) through zero every half cycle. In the instance of self-resetting devices, the Josephson junctions normally reset themselves to the zero voltage state. Single phase and multiphase logic circuit powering arrangements are shown including a shift register arrangement which requires only two phases to achieve passage of information from the input to the output of the shift register. All of the arrangements shown include regulating means formed from a string of series connected Josephson junctions, the I-V characteristic of which effectively clips both positive and negative portions of the applied alternating current. Also included is a scheme for powering the logic gates with a constant voltage source and the parallel arrangement thereof which provides stable and isolated logic circuits. Under such circumstances, the maximum value of current applied to the logic circuits is carefully controlled and a plurality of logic circuits may be connected in cascade but isolated from each other across the regulator string. The logic circuits utilized are per se well known and may consist of terminated line logic circuits connected to a pair of low impedance buses via a single current defining resistance or via a pair of current defining resistances of value equal to R/2, where the value of R is large relative to the characteristic impedance of the power buses. Also shown are transformer means for applying AC current from an AC source to a logic circuit via board-to-module, module-to-chip and chip-to-logic circuit transformers.

    5.
    发明专利
    未知

    公开(公告)号：DE2651443A1

    公开(公告)日：1977-09-08

    申请号：DE2651443

    申请日：1976-11-11

    Applicant: IBM

    Inventor： HERRELL DENNIS JAMES ,  FANG FRANK FU

    IPC: G11C19/32 ,  G05F3/02 ,  G11C11/44 ,  H03K17/92 ,  H03K19/00 ,  H03K19/195

    Abstract: An alternating current powering arrangement for use with Josephson junction devices which have bilateral gain characteristics is disclosed. Using an alternating current input to a Josephson junction logic circuit, it is possible to carry out a desired binary logic function during one half of an alternating current cycle; reset the logic circuit; and carry out a different binary logic function during the second half of the alternating current cycle. In the instance of latching circuits, the Josephson junction logic circuits are reset by the passage of the alternating current (which is normally the gate current of the Josephson junction) through zero every half cycle. In the instance of self-resetting devices, the Josephson junctions normally reset themselves to the zero voltage state. Single phase and multiphase logic circuit powering arrangements are shown including a shift register arrangement which requires only two phases to achieve passage of information from the input to the output of the shift register. All of the arrangements shown include regulating means formed from a string of series connected Josephson junctions, the I-V characteristic of which effectively clips both positive and negative portions of the applied alternating current. Also included is a scheme for powering the logic gates with a constant voltage source and the parallel arrangement thereof which provides stable and isolated logic circuits. Under such circumstances, the maximum value of current applied to the logic circuits is carefully controlled and a plurality of logic circuits may be connected in cascade but isolated from each other across the regulator string. The logic circuits utilized are per se well known and may consist of terminated line logic circuits connected to a pair of low impedance buses via a single current defining resistance or via a pair of current defining resistances of value equal to R/2, where the value of R is large relative to the characteristic impedance of the power buses. Also shown are transformer means for applying AC current from an AC source to a logic circuit via board-to-module, module-to-chip and chip-to-logic circuit transformers.

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