公开(公告)号：CA2060555A1

公开(公告)日：1992-10-25

申请号：CA2060555

申请日：1992-02-03

Applicant: IBM

Inventor： BULLIONS ROBERT J III ,  HILL RONALD F ,  NADAS STEPHEN J ,  PEDERSEN RAYMOND J

IPC: G06F9/38 ,  G06F9/30 ,  G06F9/318 ,  G06F9/46 ,  G06F15/16

Abstract: P09-91-013 SYSTEM AND METHOD FOR DRAINING AN INSTRUCTION PIPELINE The present invention comprises a system and method for selectively draining an instruction pipeline. In one embodiment, the invention is implemented in the context of pipelined processor having an interpretive storage and multiple execution units. In the described system, the instructions held in the interpretive storage are referred to as "milli-instructions" and the interpretive execution mode is referred to as "milli-mode". Additional hardware controlled instructions (private milli-mode only instructions) are added to provide control functions or to improve performance. These private milli-mode instructions augment the architected instruction set. Milli-mode routines can intermingle the milli-mode only instructions with architected instructions to implement complex functions. In order to provide an enhanced level of flexibility and efficiency, the above-described embodiment includes a milli-instruction that causes the pipeline to drain. This milli-instruction, called DRAIN INSTRUCTION PIPELINE (DIP) allows greater selectivity by the coder over (1) when to drain the pipeline and (2) what type of pipeline drain to perform. In the preferred embodiment, the DIP instruction enables the coder to cause the system to suspend decoding until a selected event occurs. Specifically, the instruction includes options to suspend decoding until a selected one of the following events has occurred: all conceptually previous macro instructions have completed; all conceptually previous milli-code instructions have completed; all conceptually previous instructions have completed; all store requests have reached the point where no exceptions will occur, but the actual store may not have completed; all conceptually previous stores from all conceptually previous units-of-operation have completed (serialize); or invalidate instruction buffers and fetch the next sequential macro-instructions.

公开(公告)号：BR9005264A

公开(公告)日：1991-09-17

申请号：BR9005264

申请日：1990-10-18

Applicant: IBM

Inventor： BLANDY GEOFFREY O ,  EMMES DAVID B ,  HILL RONALD F ,  LINDQUIST DAVID B ,  PLAMBECK KENNETH E ,  SCALZI CASPER A ,  SCHMALZ RICHARD JOHN

IPC: G06F12/10 ,  G06F12/14 ,  G06F9/44

Abstract: A single non-privileged instruction copies a page of data from a source virtual address to a destination virtual address, regardless of which of plural electronic storage media contain the page locations, and without the intervention of any supervisory program when media and virtual addressing have been previously determined for the locations of the subject pages. The instruction is not required to specify which of the plural media it will use, does not require its user to know what backing media it will access, does not require main storage (MS) to be one of its backing media, and allows different types of physical addressing to be used by the different backing media. The instruction can lock any page for use in an MP. No physical direction of data movement is provided within the non-privileged machine instruction, which only designates virtual direction of movement. The separation of virtual direction from physical direction is done by avoiding instruction control over selection of electronic media. The non-privileged instruction can nevertheless express a preference for obtaining a copy of the destination page in an electronic medium in which the content of the page can be processed by further instructions. Also, the instruction can cause invocation of a privileged control program to avoid the need for a following condition code test instruction. A privileged instruction is also provided to wait for the completion of the unprivileged instruction and to invalidate a non-main storage (MS) medium page whether it is unlocked or locked, either correctly or incorrectly.

公开(公告)号：CA2024444C

公开(公告)日：1995-08-15

申请号：CA2024444

申请日：1990-08-31

Applicant: IBM

Inventor： BLANDY GEOFFREY O ,  EMMES DAVID B ,  HILL RONALD F ,  LINDQUIST DAVID B ,  PLAMBECK KENNETH E ,  SCALZI CASPER A ,  SCHMALZ RICHARD J

IPC: G06F12/10 ,  G06F12/14 ,  G06F12/00

Abstract: A single non-privileged instruction copies a page of data from a source virtual address to a destination virtual address, regardless of which of plural electronic storage media contain the page locations, and without the intervention of any supervisory program when media and virtual addressing have been previously determined for the locations of the subject pages. The instruction is not required to specify which of the plural media it will use, does not require its user to know what backing media it will access, does not require main storage (MS) to be one of its backing media, and allows different types of physical addressing to be used by the different backing media. The instruction can lock any page for use in an MP. No physical direction of data movement is provided within the non-privileged machine instruction, which only designates virtual direction of movement. The separation of virtual direction from physical direction is done by avoiding instruction control over selection of electronic media. The non-privileged instruction can nevertheless express a preference for obtaining a copy of the destination page in an electronic medium in which the content of the page can be processed by further instructions. Also, the instruction can cause invocation of a privileged control program to avoid the need for a following condition code test instruction. A privileged instruction is also provided to wait for the completion of the unprivileged instruction and to invalidate a non-MS medium page whether it is unlocked or locked, either correctly or incorrectly.