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公开(公告)号:CA1148269A
公开(公告)日:1983-06-14
申请号:CA372670
申请日:1981-03-10
Applicant: IBM
Inventor: HORNG CHENG T , KONIAN RICHARD R , SCHWENKER ROBERT O , WIEDER ARMIN W
IPC: H01L21/331 , H01L21/762 , H01L21/8224 , H01L21/8228 , H01L27/082 , H01L29/10 , H01L29/423 , H01L29/73 , H01L29/732 , H01L29/735 , H01L27/04 , H01L21/72
Abstract: Disclosed is the fabrication and structure of very small integrated circuit devices of both PNP and NPN types with very high speeds and low power requirements. The structure provides vertical NPN and lateral PNP transistors formed within the same semiconductor chip. The base width of the lateral PNP transistor is very narrow (approximately 300 to 400 nanometers). This narrow dimension is in part obtained by using a well defined chemically vapor deposited (CVD) oxide mask instead of conventional lithographic masking. To eliminate the emitter current injecting into the substrate the P+ emitter and P+ collector of the PNP transistor are bounded by a silicon nitride and silicon dioxide dielectric layer. FI 9-79-014
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公开(公告)号:IT1165311B
公开(公告)日:1987-04-22
申请号:IT2584979
申请日:1979-09-20
Applicant: IBM
Inventor: KONIAN RICHARD R , WALSH JAMES L
IPC: H03K17/60 , H03K17/66 , H03K19/086 , H03K
Abstract: A high speed current switch logic circuit wherein a first and a second transistor are operated in a current switching mode and wherein a third and a fourth transistor are provided whereby the current switching operation of the first and second transistor causes current switching operation of the third and fourth transistors and push pull switching of power to a load.
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公开(公告)号:IT7925849D0
公开(公告)日:1979-09-20
申请号:IT2584979
申请日:1979-09-20
Applicant: IBM
Inventor: KONIAN RICHARD R , WALSH JAMES L
IPC: H03K17/60 , H03K17/66 , H03K19/086 , H03K
Abstract: A high speed current switch logic circuit wherein a first and a second transistor are operated in a current switching mode and wherein a third and a fourth transistor are provided whereby the current switching operation of the first and second transistor causes current switching operation of the third and fourth transistors and push pull switching of power to a load.
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