公开(公告)号：JP2006019730A

公开(公告)日：2006-01-19

申请号：JP2005184662

申请日：2005-06-24

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： BEZAMA RASCHID J ,  COLGAN EVAN GEORGE ,  MAGERLEIN JOHN H ,  SCHMIDT ROGER R

IPC: H01L23/473

CPC classification number: F28F3/04 ,  F28F3/12 ,  F28F2260/02 ,  H01L23/473 ,  H01L2924/0002 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide an apparatus and a method of cooling an electronic device such as an IC chip or the like uneven in power density distribution, mounted on a package substrate upside down with efficiency and low operating pressure. SOLUTION: The invention comprises the apparatus and the method operated by microchannel cooling which locally improve cooling capability with respect to a (hot spot) region of the IC chip higher than an average in power density by operating a mechanism varying local cooling capability with respect to a high power density region (namely, "hot spot") of a semiconductor chip higher than the average in the power density. For example, an integrally formed microchannel cooling device (or a microchannel heat sink device) cooling the IC chip is designed so that the local cooling capability with respect to the high power density region (namely, "hot spot") of the IC chip higher than the average in the power density can vary in such a way that a cooling fluid flows and distributed uniformly, and that a pressure drop along a cooling liquid passage is suppressed to a minimum. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种以功率密度分布不​​均匀的电子器件如IC芯片等的冷却装置和方法，其以效率和低的操作压力上下颠倒地安装在封装衬底上。 解决方案：本发明包括通过微通道冷却操作的装置和方法，其通过操作改变局部冷却能力的机构来局部地提高相对于IC芯片的（热点）区域的功率密度的平均值的冷却能力 相对于高于功率密度的平均值的半导体芯片的高功率密度区域（即，“热点”）。 例如，设计冷却IC芯片的整体形成的微通道冷却装置（或微通道散热装置），使得相对于IC芯片的高功率密度区域（即，“热点”）的局部冷却能力更高 功率密度的平均值可以以冷却流体均匀流动并分布的方式变化，并且沿着冷却液通道的压降被抑制到最小。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005175483A

公开(公告)日：2005-06-30

申请号：JP2004353571

申请日：2004-12-07

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： COLGAN EVAN G ,  FEGER CLAUDIS ,  GOTH GARY F ,  KATOPIS GEORGE A ,  MAGERLEIN JOHN H ,  SPROGIS EDMUND J

IPC: H01L23/34 ,  H01L21/50 ,  H01L21/56 ,  H01L23/10 ,  H01L23/12 ,  H01L23/36 ,  H01L23/367 ,  H01L23/373

CPC classification number: H01L23/367 ,  H01L23/3737 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: PROBLEM TO BE SOLVED: To reduce the temperature of a hot spot of a chip by locally reducing the layer thickness of a compliant thermally conductive material on the chip.
SOLUTION: In an integrated circuit package structure within MCM or SCM, a compliant thermally conductive material is applied between a heat-producing integrated circuit and a substrate attached thereto. A thinner layer of the compliant thermally conductive material is arranged between the chip and the substrate in this region after assembling, and as a result, a raised region aligned to a high power density region higher than the average on the active front surface of the chip is defined at the backside of the chip so that the temperature of the "hot spot" on the chip is reduced. In an exemplary embodiment, the substrate comprises one of a heat sink, cooling plate, heat spreader, heat pipe, heat hat, package lid, and other cooling members.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：通过局部减小芯片上柔性导热材料的层厚来降低芯片热点的温度。 解决方案：在MCM或SCM中的集成电路封装结构中，将柔性导热材料施加在发热集成电路和附着于其之间的衬底之间。 柔性导热材料的较薄层在组装之后在该区域中布置在芯片和基板之间，结果是与高于芯片的有源前表面上的平均值的高功率密度区域对准的凸起区域 被限定在芯片的背面，使得芯片上的“热点”的温度降低。 在示例性实施例中，基板包括散热器，冷却板，散热器，热管，加热帽，封装盖和其它冷却构件中的一个。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2005217419A

公开(公告)日：2005-08-11

申请号：JP2005021309

申请日：2005-01-28

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： EDELSTEIN DANIEL C ,  ANDRICACOS PANAYOTIS C ,  COTTE JOHN M ,  DELIGIANNI HARIKLIA ,  MAGERLEIN JOHN H ,  PETRARCA KEVIN S ,  STEIN KENNETH JAY ,  VOLANT RICHARD P

IPC: H01F41/04 ,  H01F17/00 ,  H01L21/02 ,  H01L23/485 ,  H01L23/522 ,  H01L23/532 ,  H01L27/08

CPC classification number: H01L24/12 ,  H01L23/5227 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L27/08 ,  H01L28/10 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05007 ,  H01L2224/05014 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05084 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide an inductor and a method of forming the inductor. SOLUTION: The method of forming the inductor comprises (a) a step for providing a semiconductor substrate, (b) a step for forming a dielectric layer on the surface of the substrate, (c) a step for forming a lower trench in the dielectric layer, (d) a step for forming a resist layer on the surface of the dielectric layer, (e) a step for forming an upper trench which is aligned to the lower trench and whose bottom is opened for the lower trench in the resist layer, and (f) a step for completely filling the lower trench with a conductor and at least partially filling the upper trench with the conductor to form the inductor. The semiconductor structure includes the inductor including the upper surface, bottom surface and sidewall and a means that allows the inductor to be electrically contacted, the lower section of the inductor is extended by a distance that the lower section of the inductor is fixed in the dielectric layer formed on the substrate, and the upper section thereof is extended on the dielectric layer. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供电感器和形成电感器的方法。 形成电感器的方法包括（a）提供半导体衬底的步骤，（b）在衬底的表面上形成电介质层的步骤，（c）形成下沟槽的步骤 在电介质层中，（d）在电介质层的表面上形成抗蚀剂层的步骤，（e）形成上沟槽的步骤，该上沟槽与下沟槽对准并且底部为下沟槽开口 抗蚀剂层，和（f）用导体完全填充下沟槽并且至少部分地用导体填充上沟槽以形成电感器的步骤。 半导体结构包括电感器，其包括上表面，底表面和侧壁，以及允许电感器电接触的装置，电感器的下部延伸一段距离，电感器的下部固定在电介质中 层，其上部在电介质层上延伸。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2005055885A

公开(公告)日：2005-03-03

申请号：JP2004213302

申请日：2004-07-21

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ALAN F BENER ,  EVAN G COLGAN ,  LIN HOW TZU ,  MAGERLEIN JOHN H ,  FRANK L PONPEO ,  SHINDE SUBHASH L ,  STIGLIANI DANIEL J JR

IPC: G02B6/36 ,  G02B6/42 ,  G06F1/20 ,  G06F3/00

CPC classification number: G02B6/4201 ,  G02B6/4246 ,  G02B6/4249 ,  G02B6/4268 ,  G02B6/4281 ,  G02B6/4283 ,  G02B6/4292

Abstract: PROBLEM TO BE SOLVED: To provide an optoelectronic assembly for a computer system with respect to a mounting structure to establish optoelectronic communication between an electronic chip on a first level package and a high-density light transmitter-receiver. SOLUTION: The optoelectronic assembly includes an electronic chip 110, a substrate 120, an electric signaling medium 140, an optoelectronic transducer 160, and an optical coupling guide 170. The electronic chip is in communication with the substrate, which is in communication with a first end of the electric signaling medium. A second end of the electric signaling medium is in communication with the optoelectronic transducer. The optical coupling guide positions an optical signaling medium with respect to the optoelectronic transducer. An electric signal from the electronic chip is transmitted to the optoelectronic transducer via the substrate and the electric signaling medium. The electronic chip and the optoelectronic transducer share a common heat spreader. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：为相对于安装结构提供用于计算机系统的光电组件，以建立第一级封装上的电子芯片与高密度光收发器之间的光电连通。 解决方案：光电组件包括电子芯片110，基板120，电信号介质140，光电转换器160和光耦合引导件170.电子芯片与正在通信的基板连通 具有电信号介质的第一端。 电信号介质的第二端与光电转换器连通。 光耦合引导件相对于光电传感器定位光信号介质。 来自电子芯片的电信号通过基板和电信号介质传输到光电换能器。 电子芯片和光电传感器共享共用散热器。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：GB2491519B

公开(公告)日：2014-03-19

申请号：GB201215987

申请日：2011-01-20

Applicant: IBM

Inventor： ANDRY PAUL S ,  BRUNSCHWILER THOMAS J ,  COLGAN EVAN ,  MAGERLEIN JOHN H

IPC: H01L23/14 ,  H01L23/367 ,  H01L23/473 ,  H01L23/498 ,  H01L25/065 ,  H05K7/20

Abstract: A plurality of heat-dissipating electronic chips are arranged in a vertical chip stack. The electronic chips have electronic components thereon. A cold plate is secured to a back side of the chip stack. A silicon carrier sandwich, defining a fluid cavity, is secured to a front side of the chip stack. An inlet manifold is configured to supply cooling fluid to the cold plate and the fluid cavity of the silicon carrier sandwich. An outlet manifold is configured to receive the cooling fluid from the cold plate and the fluid cavity of the silicon carrier sandwich. The cold plate, the silicon carrier sandwich, the inlet manifold, and the outlet manifold are configured and dimensioned to electrically isolate the cooling fluid from the electronic components. A method of operating an electronic apparatus and a method of manufacturing an electronic apparatus are also disclosed. Single-sided heat removal with double-sided electrical input-output and double-sided heat removal with double-sided electrical input-output are also disclosed.

公开(公告)号：GB2491519A

公开(公告)日：2012-12-05

申请号：GB201215987

申请日：2011-01-20

Applicant: IBM

Inventor： ANDRY PAUL S ,  BRUNSCHWILER THOMAS J ,  COLGAN EVAN ,  MAGERLEIN JOHN H

IPC: H01L23/14 ,  H01L23/367 ,  H01L23/473 ,  H01L23/498 ,  H01L25/065 ,  H05K7/20

Abstract: A plurality of heat-dissipating electronic chips are arranged in a vertical chip stack. The electronic chips have electronic components thereon. A cold plate is secured to a back side of the chip stack. A silicon earner sandwich, defining a fluid cavity, is secured to a front side of the chip stack. An inlet manifold is configured to supply cooling fluid to the cold plate and the fluid cavity of the silicon carrier sandwich. An outlet manifold is configured to receive the cooling fluid from the cold plate and the fluid cavity of the silicon carrier sandwich. The cold plate, the silicon earner sandwich, the inlet manifold, and the outlet manifold are configured and dimensioned to electrically isolate the cooling fluid from the electronic components. A method of operating an electronic apparatus and a method of manufacturing an electronic apparatus are also disclosed. Single-sided heat removal with double-sided electrical input-output and double-sided heat removal with double-sided electrical input-output are also disclosed.