公开(公告)号：DE69530547D1

公开(公告)日：2003-06-05

申请号：DE69530547

申请日：1995-08-11

Applicant: IBM

Inventor： CHAN SHUN SHING ,  CESAR CHRISTIAN LENZ ,  COFINO THOMAS ANTHONY ,  GOLDMAN KENNETH ALAN ,  GREENE SHARON L ,  HEINRICH HARLEY KENT ,  MCAULIFFE KEVIN PATRICK

IPC: G01S13/75 ,  G01S13/76 ,  G01S13/79 ,  G06K7/00 ,  G06K17/00 ,  G07C3/00 ,  G07C9/00 ,  H04B1/59 ,  G06K7/10

Abstract: A system and method is disclosed for selecting certain subgroups of radio frequency (RF) tags for querying, communicating, and/or identifying by a base station. The base station sends commands to a group tags within a RF field of the base station. The tags use control logic to determine whether or not they meet certain criteria sent out by the commands. This may cause the tags to change state which either prevents or allows a given tag to participate in an identification process. In this way, a given subgroup(s) of tags meeting certain criteria can be selected for querying, communicating, and/or identifying.

公开(公告)号：DE69530547T2

公开(公告)日：2004-02-26

申请号：DE69530547

申请日：1995-08-11

Applicant: IBM

Inventor： CHAN SHUN SHING ,  CESAR CHRISTIAN LENZ ,  COFINO THOMAS ANTHONY ,  GOLDMAN KENNETH ALAN ,  GREENE SHARON L ,  HEINRICH HARLEY KENT ,  MCAULIFFE KEVIN PATRICK

IPC: G01S13/75 ,  G01S13/76 ,  G01S13/79 ,  G06K7/00 ,  G06K17/00 ,  G07C3/00 ,  G07C9/00 ,  H04B1/59 ,  G06K7/10

Abstract: A system and method is disclosed for selecting certain subgroups of radio frequency (RF) tags for querying, communicating, and/or identifying by a base station. The base station sends commands to a group tags within a RF field of the base station. The tags use control logic to determine whether or not they meet certain criteria sent out by the commands. This may cause the tags to change state which either prevents or allows a given tag to participate in an identification process. In this way, a given subgroup(s) of tags meeting certain criteria can be selected for querying, communicating, and/or identifying.

公开(公告)号：DE68921365T2

公开(公告)日：1995-10-05

申请号：DE68921365

申请日：1989-03-22

Applicant: IBM

Inventor： MCAULIFFE KEVIN PATRICK ,  NORTON VERN ALAN ,  PFISTER GREGORY FRANCIS ,  RATHI BHARAT DEEP

IPC: G06F15/167 ,  G06F12/12 ,  G06F13/16 ,  G06F15/173 ,  H04L12/56 ,  G06F15/16 ,  G06F12/02 ,  G06F9/46

Abstract: An interconnection network management architecture for use with a large shared memory multiprocessor computing system including a plurality of processors and a plurality of separately addressable main memory modules. Two parallel, interconnection networks are provided each capable of interconnecting any processor to any memory module, and each having different latency characteristics. A Hot-Spot detection means is associated with each main memory module for detecting when a particular address in that module has become a Hot Spot and includes a first memory for storing all detected Hot Spots. A diverter element is associated with each processor for selectively routing memory requests over either said first or second memory network con tingent on its status as a Hot Spot. A second memory is included in each diverter element for storing all Hot Spots detected by the detector elements. A control mechanism determines if any current main memory address is a listed Hot Spot within said second memory and, if so, causes the main memory reference to be transmitted to the memory system over a selected interconnection network. Another component of this mechanism determines if a particular address has been accessed a sufficient number of times within a given timeframe to be deemed a Hot Spot and removes Hot Spots from both the first and second memories when necessary.

公开(公告)号：DE68921365D1

公开(公告)日：1995-04-06

申请号：DE68921365

申请日：1989-03-22

Applicant: IBM

Inventor： MCAULIFFE KEVIN PATRICK ,  NORTON VERN ALAN ,  PFISTER GREGORY FRANCIS ,  RATHI BHARAT DEEP

IPC: G06F15/167 ,  G06F12/12 ,  G06F13/16 ,  G06F15/173 ,  H04L12/56 ,  G06F15/16 ,  G06F12/02 ,  G06F9/46

Abstract: An interconnection network management architecture for use with a large shared memory multiprocessor computing system including a plurality of processors and a plurality of separately addressable main memory modules. Two parallel, interconnection networks are provided each capable of interconnecting any processor to any memory module, and each having different latency characteristics. A Hot-Spot detection means is associated with each main memory module for detecting when a particular address in that module has become a Hot Spot and includes a first memory for storing all detected Hot Spots. A diverter element is associated with each processor for selectively routing memory requests over either said first or second memory network con tingent on its status as a Hot Spot. A second memory is included in each diverter element for storing all Hot Spots detected by the detector elements. A control mechanism determines if any current main memory address is a listed Hot Spot within said second memory and, if so, causes the main memory reference to be transmitted to the memory system over a selected interconnection network. Another component of this mechanism determines if a particular address has been accessed a sufficient number of times within a given timeframe to be deemed a Hot Spot and removes Hot Spots from both the first and second memories when necessary.