公开(公告)号：JP2002314253A

公开(公告)日：2002-10-25

申请号：JP2002060395

申请日：2002-03-06

Applicant: IBM

Inventor： JONES GERALD W ,  LAUFFER JOHN M ,  MARKOVICH VOYA R ,  MILLER THOMAS R ,  PAOLLETTI JAMES P ,  CONSTANTINOS I PAPATHOMAS ,  STACK JAMES R

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To provide a method which is newly simplified for forming a multilayer printed wiring board structure having a z-axis interconnection. SOLUTION: For forming a multilayer printed wiring board 10, a plurality of separate layers 12, 14, 16, 18 are shown, and in this example, the board 10 is constituted of four layers in total. As is well known, each layer is originally composed of a dielectric material such as an organic board, and on both surfaces thereof, namely on surfaces 12a, 12b, 14a, 14b, 16a, 16b, 18a, 18b, a suitable circulating plating, namely a wire is provided. As is well known, this is selectively adhered by use of a mask, etc. Each of the layers 12, 14, 16, 18 has a thickness 't' suitably in the range of about 0.50 mm (about 20 mil) to about 2.54 mm (about 100 mil) in correspondence to a size of a hole or a via formed therein.