公开(公告)号：GB2605224B

公开(公告)日：2025-03-12

申请号：GB202115083

申请日：2021-10-21

Applicant: IBM

Inventor： KAMAL K SIKKA ,  SHIDONG LI ,  TUHIN SINHA ,  JEFFREY ALLEN ZITZ

IPC: H01L23/34

Abstract: A chip package comprises a chip having a first temperature sensor. The first temperature sensor is configured to measure a first temperature of the chip in a localized area around the first temperature sensor. The chip package also includes a chip carrier coupled to the chip via a plurality of solder connections. The chip carrier includes a second temperature sensor vertically aligned with the first temperature sensor. The second temperature sensor is configured to measure a second temperature of the chip carrier in a localized area around the second temperature sensor. The chip carrier further includes a localized heater element located near the second temperature sensor and configured to generate heat in response to a detected difference based on comparison of the first temperature and the second temperature such that the detected difference is adjusted in the localized area around the first temperature sensor.

公开(公告)号：GB2605234A

公开(公告)日：2022-09-28

申请号：GB202116911

申请日：2021-11-24

Applicant: IBM

Inventor： HONGQING ZHANG ,  JAY A BUNT ,  SHIDONG LI ,  ZHIGANG SONG ,  GUODA LIAN ,  JUNJUN LI

IPC: H05K1/02 ,  G06F21/86

Abstract: Tamper-respondent assembly including circuit board 610, electronic component 602 and enclosure assembly 620 coupled to circuit board 610 to enclose electronic component 602 within a secure volume 601. Enclosure assembly 620 includes an enclosure with a sealed inner compartment 623 containing a structural material 701. Structural material 701 inhibits deflection of the enclosure due to a pressure differential between the sealed inner compartment 623 and around the enclosure 620. Pressure sensor 640 sense pressure within sealed inner compartment 623 to facilitate identification of a pressure change indicative of a tamper event. Optionally, structural material 701 may comprise a foam metal with interconnected pores. Enclosure 620 may comprise a metal enclosure with inner and outer walls. Foam metal within the sealed inner compartment 623 may be diffusion bonded to these walls. Sealed inner compartment 623 may comprise two sealed inner chambers of differing pressures, both containing structural material 701. A monitor circuit may be positioned within secure volume 601 to monitor the pressure of sealed inner compartment 623 via pressure sensor 640.

公开(公告)号：IL294968A

公开(公告)日：2022-09-01

申请号：IL29496822

申请日：2022-07-21

Applicant: IBM ,  CHARLES LEON ARVIN ,  BHUPENDER SINGH ,  SHIDONG LI ,  CHRIS CHRISTOPHER MUZZY ,  THOMAS ANTHONY WASSICK

Inventor： CHARLES LEON ARVIN ,  BHUPENDER SINGH ,  SHIDONG LI ,  CHRIS (CHRISTOPHER) MUZZY ,  THOMAS ANTHONY WASSICK

IPC: H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L23/64 ,  H01L25/00 ,  H01L25/065

Abstract: A module includes a substrate having a plurality of contact regions, and a spacer-chip assembly. The spacer-chip assembly in turn includes at least first and second semiconductor dies, each having a plurality of electrical interconnect pillars and a plurality of contact pads, and a spacer wafer. The at least first and second semiconductor dies are secured to the spacer wafer, and the spacer wafer includes at least first and second semiconductor circuit features coupled to a first portion of the contact pads of the at least first and second semiconductor dies. The spacer wafer includes wiring electrically coupling the at least first and second semiconductor dies via a second portion of the contact pads. The spacer wafer has a plurality of holes formed therethrough. The plurality of electrical interconnect pillars extend through the holes and are secured to the contact regions on the substrate.

公开(公告)号：GB2605224A

公开(公告)日：2022-09-28

申请号：GB202115083

申请日：2021-10-21

Applicant: IBM

Inventor： KAMAL K SIKKA ,  SHIDONG LI ,  TUHIN SINHA ,  JEFFREY ALLEN ZITZ

IPC: H01L23/34

Abstract: A chip package 100 comprises a chip 102 having a first temperature sensor 108 configured to measure a first temperature of the chip in a localized area around the first temperature sensor. The chip package also includes a chip carrier 104 coupled to the chip via a plurality of solder connections 106. The chip carrier includes a second temperature sensor 112 vertically aligned with the first temperature sensor. The second temperature sensor is configured to measure a second temperature of the chip carrier in a localized area around the second temperature sensor. The chip carrier further includes a localized heater element 114 located near the second temperature sensor and configured to generate heat in response to a detected difference of the temperatures at the first and second temperature sensors.