-
公开(公告)号：JP2002016623A
公开(公告)日：2002-01-18
申请号：JP2001104661
申请日：2001-04-03
Applicant: IBM
IPC: H04L12/56 , G06F9/00 , G06F9/44 , G06F9/445 , G06F15/173 , H04L12/24 , H04L12/46 , H04L29/06 , H04L29/08 , H04L29/14 , H04Q3/00
Abstract: PROBLEM TO BE SOLVED: To provide a method and a system for updating a software managing tree(SMT) so as not to disturb protocol processing. SOLUTION: Concerning the method and the system for downloading the SMT in a network processing system, a frame sorter can be dynamically updated while maintaining suitable network protocol processing. The network processing system is provided with a general processor to be operated as a control point processor and plural network processors. The new SMT is composed of an application on the control point processor and downloaded to one or plural network processors. The new SMT is not overwritten on the existent SMT but located at an individual memory position accessible for the network processor. Next, an active tree pointer is changed to transfer control to the new SMT.
-
公开(公告)号：JP2002057688A
公开(公告)日：2002-02-22
申请号：JP2001104637
申请日：2001-04-03
Applicant: IBM
Inventor： GALLO ANTHONY MATTEO , HARIHARAN SEETA , HEDDES MARCO C , SURIDARU RAAO , VERRILLI COLIN BEATON , GAIL EILEEN WOODLAND
IPC: G06F15/167 , G06F9/44 , G06F12/00 , G06F12/02 , G06F12/06 , G06F13/14 , H04L12/24 , H04L12/44 , H04L12/46 , H04L12/56 , H04L29/06
Abstract: PROBLEM TO BE SOLVED: To provide a method and a system for managing a memory in a network processing system for providing the allocation of a physical memory section inside a network processor connected to a control point processor by a bus. SOLUTION: This allocation system provides a memory management layer without the need of a complete operating system interface and supports the asynchronous completion of allocation requests. Multicast allocation is supported and the allocation can be simultaneously requested on the plural network processors. An allocation mechanism returns a token, then a memory position is accessed by a protocol through the bus by using the token, and the allocation performed on the plural network processors where actual physical addresses and memory constitution are different is referred to by a single token.
-
Patent Agency Ranking
公开(公告)号：JP2002016644A
公开(公告)日：2002-01-18
申请号：JP2001092599
申请日：2001-03-28
Applicant: IBM
Inventor： CORL JR EVERETT ARTHUR , JEFFERIES CLARK DEBUS , VERRILLI COLIN BEATON
Abstract: PROBLEM TO BE SOLVED: To provide a method and a system for testing a plurality of filter rules in a computer system. SOLUTION: This system includes networks 20' and 10' as a favorable performance form. The networks 10' and 20' have control points 15 and 27. The control points 15 and 27 are favorably a general purpose computer connected to exchanges 18' and 26'. The control points 15 and 27 perform a queue used in the case of testing the filter rules and a function related to bit selection. The exchangers 18' and 26' include a decision tree that performs software management and discriminate whether a key matches one or a plurality of filter rules by using the decision tree.
-
公开(公告)号：DE60306995D1
公开(公告)日：2006-09-07
申请号：DE60306995
申请日：2003-06-06
Applicant: CIT ALCATEL , IBM
IPC: H04L12/56
-
公开(公告)号：AT334538T
公开(公告)日：2006-08-15
申请号：AT03291375
申请日：2003-06-06
Applicant: CIT ALCATEL , IBM
IPC: H04L12/56
-
公开(公告)号：DE602006007827D1
公开(公告)日：2009-08-27
申请号：DE602006007827
申请日：2006-03-15
Applicant: IBM
Inventor： BASSO CLAUDE , CALVIGNAC JEAN , CHANG CHIH-JEN , DAMON PHILIPPE , VAIDHYANATHAN NATARAJAN , VERPLANKEN FABRICE , VERRILLI COLIN BEATON
IPC: H04L29/06
Abstract: A method for reducing latency in a host Ethernet adapter (HEA) includes the following. First, the HEA receives a packet with an internet protocol (IP) header and data in the HEA. The HEA parses a connection identifier from the IP header and accesses a negative cache in the HEA to determine if the connection identifier is not in a memory external to the HEA. The HEA applies a default treatment to the packet if the connection identifier is not in the memory, thereby reducing latency by decreasing access to the memory.
-
公开(公告)号：DE60306995T2
公开(公告)日：2007-03-01
申请号：DE60306995
申请日：2003-06-06
Applicant: CIT ALCATEL , IBM
IPC: H04L12/56
-
-
-
-
-
-
Search Results
7
records
(took 0.018 seconds)
