SELF REGULATING TEMPERATURE/PERFORMANCE/VOLTAGE SCHEME FOR MICROS (X86)

    公开(公告)号:SG109455A1

    公开(公告)日:2005-03-30

    申请号:SG200103837

    申请日:1997-11-21

    Applicant: IBM

    Abstract: A processor which optimizes performance opportunistically by using a hierarchy of variables comprising voltage, clocking and the operations being performed by the processor or its system. The invention accomplishes performance optimization by defining various states with the goal that the processor stays in an optimal performance state of accelerated voltage and clock when the processor executional units are operating. The states are selected by a logic network based on information that is provided by temperature sensors and a performance control. The logic network can be envisioned as an UP-DOWN counter. The counter can be advanced UP or DOWN the state "ladder" as the conditions warrant.

    PREDICTIVE CACHE LOADING BY PROGRAM ADDRESS DISCONTINUITY HISTORY

    公开(公告)号:SG90028A1

    公开(公告)日:2002-07-23

    申请号:SG1998000547

    申请日:1998-03-14

    Applicant: IBM

    Abstract: A call progress analysis system is provided which is generic to any telecommunications system with which it is used due to configurable detection parameters. A signal on a channel of the telecommunications system is detected in intervals of changing frequency composition and compared to stored pattern descriptors, each of which defines a different call progress signal. In an alternative embodiment of the invention, a frequency mask is computed that is specific to a user-defined call progress analysis class. This frequency mask is used to make the DSP receiver ignore frequencies that are not part of any call progress pattern in a particular class. The frequency mask can be used in a frequency detection mode or an energy detection mode. In either mode, the detector can be customized for each channel.

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