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    Integrated circuit package
    1.
    发明专利
    Integrated circuit package 审中-公开
    集成电路封装

    公开(公告)号：JP2004349714A

    公开(公告)日：2004-12-09

    申请号：JP2004177959

    申请日：2004-06-16

    Applicant: Intel Corp ,  インテル・コーポレーションIntel Corporation

    Inventor： SANKMAN BOB ,  AZIMI HAMID

    IPC: H01L23/12 ,  H01L21/48 ,  H01L23/498 ,  H05K3/34 ,  H05K3/46

    CPC classification number: H01L23/49811 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/15312 ,  H05K3/3426 ,  H05K3/4602

    Abstract: PROBLEM TO BE SOLVED: To provide a substrate joint technology in order to obtain electric, physical connection between external circuits in a multilayer substrate.
    SOLUTION: A substrate 104 has a conductive viahole 126 prepared between isolated conductive layers. A viahole 124 is formed by laser in such a manner that it penetrates an insulator separating the conductive layers. Interconnection portion to exterior which consists of a T typeface pin is soldered to the substrate 104 of an integrated circuit package. An integrated circuit 102 can be adhered to the substrate by flip chip method.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：提供一种基板接合技术，以获得多层基板中的外部电路之间的电气物理连接。 解决方案：衬底104具有在隔离的导电层之间制备的导电通孔126。 通孔124通过激光形成，使得其穿透分离导电层的绝缘体。 由T字表面引脚构成的互连部分外部被焊接到集成电路封装的基板104。 集成电路102可以通过倒装芯片方法粘附到衬底。 版权所有（C）2005，JPO＆NCIPI

    INTERCONNECT STRUCTURE AND METHOD OF FABRICATION THEREFOR
    2.
    发明申请
    INTERCONNECT STRUCTURE AND METHOD OF FABRICATION THEREFOR 审中-公开
    互连结构及其制造方法

    公开(公告)号：WO0148819A3

    公开(公告)日：2002-03-07

    申请号：PCT/US0035483

    申请日：2000-12-28

    Applicant: INTEL CORP

    Inventor： SANKMAN BOB

    IPC: H01L21/48 ,  H01L23/498 ,  H01L23/50 ,  H05K1/02

    CPC classification number: H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An interconnect structure for microelectronic devices includes a first plated through hole (PTH) via formed through a core material, and a second PTH via concentrically located inside first PTH via, but electrically isolated from the first PTH via. A method of producing the interconnect structure includes forming a first hole through a core material layer, then forming a first conductive layer on sidewalls of the first hole, and on upper and lower surfaces of the core material layer. The first hole is substantially filled with non-conductive material, and dielectric layers are formed on substantially horizontal portions of the first conductive layer, and on top and bottom surfaces of the non-conductive material. A second hole, having a smaller diameter than the diameter of the first hole, is formed through the dielectric layers and the non-conductive material in concentric relationship to the first hole. A second conductive layer is then formed on the sidewalls of the second hole, and on upper and lower surfaces of the dielectric layers.

    Abstract translation: 用于微电子器件的互连结构包括通过芯材形成的第一电镀通孔（PTH）和通过同心地位于第一PTH通孔内部但与第一PTH通路电隔离的第二PTH。 制造互连结构的方法包括通过芯材料层形成第一孔，然后在第一孔的侧壁上以及在芯材料层的上表面和下表面上形成第一导电层。 第一孔基本上填充有非导电材料，并且电介质层形成在第一导电层的基本水平的部分上，以及非导电材料的顶表面和底表面上。 通过电介质层和与第一孔同心的非导电材料形成直径小于第一孔直径的第二孔。 然后在第二孔的侧壁上以及介电层的上表面和下表面上形成第二导电层。

    3.
    发明专利
    未知

    公开(公告)号：AT412974T

    公开(公告)日：2008-11-15

    申请号：AT00983895

    申请日：2000-12-04

    Applicant: INTEL CORP

    Inventor： SANKMAN BOB ,  AZIMI HAMID

    IPC: H01L23/00 ,  H01L23/12 ,  H01L21/48 ,  H01L23/498 ,  H05K3/34 ,  H05K3/46

    Abstract: An integrated circuit package is provided that includes a multi-layer organic substrate. The substrate has conductive vias provided between isolated conductive layers. The vias are formed using a laser to cut through a dielectric layer separating the conductive layers. External interconnects in the form of T-shaped pins are soldered to the substrate of the integrated circuit package. An integrated circuit can be attached to the substrate using a flip-chip technique.

    Integrated circuit package
    4.
    发明专利
    Integrated circuit package 未知

    公开(公告)号：AU2059501A

    公开(公告)日：2001-06-12

    申请号：AU2059501

    申请日：2000-12-04

    Applicant: INTEL CORP

    Inventor： SANKMAN BOB ,  AZIMI HAMID

    IPC: H01L23/12 ,  H01L21/48 ,  H01L23/498 ,  H05K3/34 ,  H05K3/46 ,  H01L23/00

    Abstract: An integrated circuit package is provided that includes a multi-layer organic substrate. The substrate has conductive vias provided between isolated conductive layers. The vias are formed using a laser to cut through a dielectric layer separating the conductive layers. External interconnects in the form of T-shaped pins are soldered to the substrate of the integrated circuit package. An integrated circuit can be attached to the substrate using a flip-chip technique.

    INTEGRATED CIRCUIT PACKAGE
    6.
    发明申请
    INTEGRATED CIRCUIT PACKAGE 审中-公开
    集成电路封装

    公开(公告)号：WO0141212A3

    公开(公告)日：2001-12-13

    申请号：PCT/US0032904

    申请日：2000-12-04

    Applicant: INTEL CORP

    Inventor： SANKMAN BOB ,  AZIMI HAMID

    IPC: H01L23/12 ,  H01L21/48 ,  H01L23/498 ,  H05K3/34 ,  H05K3/46 ,  H05K1/03

    CPC classification number: H01L23/49811 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/15312 ,  H05K3/3426 ,  H05K3/4602

    Abstract: An integrated circuit package is provided that includes a multi-layer organic substrate. The substrate has conductive vias provided between isolated conductive layers. The vias are formed using a laser to cut through a dielectric layer separating the conductive layers. External interconnects in the form of T-shaped pins are soldered to the substrate of the integrated circuit package. An integrated circuit can be attached to the substrate using a flip-chip technique.

    Abstract translation: 提供了包括多层有机衬底的集成电路封装。 衬底具有设置在隔离导电层之间的导电通孔。 使用激光来形成通孔以切穿分隔导电层的介电层。 T形引脚形式的外部互连焊接到集成电路封装的衬底上。 集成电路可以使用倒装芯片技术连接到衬底。

    8.
    发明专利
    未知

    公开(公告)号：DE60040685D1

    公开(公告)日：2008-12-11

    申请号：DE60040685

    申请日：2000-12-04

    Applicant: INTEL CORP

    Inventor： SANKMAN BOB ,  AZIMI HAMID

    IPC: H01L23/00 ,  H01L23/12 ,  H01L21/48 ,  H01L23/498 ,  H05K3/34 ,  H05K3/46

    Abstract: An integrated circuit package is provided that includes a multi-layer organic substrate. The substrate has conductive vias provided between isolated conductive layers. The vias are formed using a laser to cut through a dielectric layer separating the conductive layers. External interconnects in the form of T-shaped pins are soldered to the substrate of the integrated circuit package. An integrated circuit can be attached to the substrate using a flip-chip technique.

    INTEGRATED CIRCUIT PACKAGE
    9.
    发明专利
    INTEGRATED CIRCUIT PACKAGE 未知

    公开(公告)号：HK1046470A1

    公开(公告)日：2003-01-10

    申请号：HK02107995

    申请日：2002-11-02

    Applicant: INTEL CORP

    Inventor： SANKMAN BOB ,  AZIMI HAMID

    IPC: H01L23/12 ,  H01L20090101 ,  H01L21/48 ,  H01L23/498 ,  H05K3/34 ,  H05K3/46

    Abstract: An integrated circuit package is provided that includes a multi-layer organic substrate. The substrate has conductive vias provided between isolated conductive layers. The vias are formed using a laser to cut through a dielectric layer separating the conductive layers. External interconnects in the form of T-shaped pins are soldered to the substrate of the integrated circuit package. An integrated circuit can be attached to the substrate using a flip-chip technique.

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