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公开(公告)号:JPS6114798A
公开(公告)日:1986-01-22
申请号:JP1564885
申请日:1985-01-31
Applicant: Ibm
Inventor: LEVINE ERNEST NORMAN , LIPSCHUTZ LEWIS DRUCKER , QUINONES HORATIO
CPC classification number: H01L24/81 , H01L2224/81801 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/15787 , H01L2924/3511 , H05K3/3436 , H01L2924/00
Abstract: Arrays of solder interconnections between a semiconductor device (10) and a supporting substrate (12) are annealed for a time in excess of one or several days below the solder melting temperature to relief stress and improve the fatigue failure of the interconnections.
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公开(公告)号:DE3570154D1
公开(公告)日:1989-06-15
申请号:DE3570154
申请日:1985-06-13
Applicant: IBM
Inventor: LEVINE ERNEST NORMAN , LIPSCHUTZ LEWIS DRUCKER , QUINONES HORATIO
IPC: H05K3/34 , C25D21/14 , H01L21/60 , H01L21/92 , H01L21/324
Abstract: Arrays of solder interconnections between a semiconductor device (10) and a supporting substrate (12) are annealed for a time in excess of one or several days below the solder melting temperature to relief stress and improve the fatigue failure of the interconnections.
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