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    CODING DEVICE, DECODING DEVICE, CODING METHOD, AND DECODING METHOD
    3.
    发明申请
    CODING DEVICE, DECODING DEVICE, CODING METHOD, AND DECODING METHOD 审中-公开

    公开(公告)号：WO2018092870A1

    公开(公告)日：2018-05-24

    申请号：PCT/JP2017041423

    申请日：2017-11-17

    Applicant: PANASONIC IP CORP AMERICA

    Inventor： LIM CHONG SOON ,  SUN HAI WEI ,  SHASHIDHAR SUGHOSH PAVAN ,  TEO HAN BOON ,  LIAO RU LING ,  NISHI TAKAHIRO ,  TOMA TADAMASA

    IPC: H04N19/119 ,  H04N19/463

    Abstract: A coding device that codes image blocks. The coding device comprises a processor and memory that is connected to the processor. The processor uses the memory to initialize block segmentation information (S5001). If the initialized block segmentation information is used, a block is segmented into a plurality of sub-blocks for a first geometry set. Then the processor writes a parameter into a bit stream (S5002) and uses the written parameter to correct the initialized block segmentation information to produce corrected block segmentation information (S5003). If the corrected block segmentation information is used, the block is segmented into a plurality of sub-blocks for a geometry set that is different from the first geometry set. Then the processor uses the corrected block segmentation information to correct the geometry of the plurality of sub-blocks (S5004). Then the processor codes the sub-blocks included in the plurality of sub-blocks using coding processing that includes transform processing and/or prediction processing (S5005).

    CODIFICADOR, DECODIFICADOR, METODO DE CODIFICACION Y METODO DE DECODIFICACION
    5.
    发明专利
    CODIFICADOR, DECODIFICADOR, METODO DE CODIFICACION Y METODO DE DECODIFICACION 未知

    公开(公告)号：MX2025000829A

    公开(公告)日：2025-03-07

    申请号：MX2025000829

    申请日：2022-02-23

    Applicant: PANASONIC IP CORP AMERICA

    Inventor： LI JING YA ,  LIM CHONG SOON ,  TEO HAN BOON ,  KUO CHE-WEI ,  SUN HAI WEI ,  WANG CHU TONG ,  ABE KIYOFUMI ,  NISHI TAKAHIRO ,  TOMA TADAMASA ,  KATO YUSUKE

    IPC: H04N19/52 ,  H04N19/593

    Abstract: Un codificador (100) incluye circuitos y una memoria acoplada a los circuitos. Los circuitos, en funcionamiento: determinan si un tamaño de un bloque actual, que es una unidad para la que se genera una lista de candidatos a vector que incluye candidatos a vector, es menor o igual que un umbral (S3001); cuando el tamaño del bloque actual es menor o igual que el umbral (SÍ en S3001), generan la lista de candidatos a vector registrando un candidato a vector de movimiento basado en la historia (HMVP) en la lista de candidatos a vector desde una tabla HMVP sin realizar un primer proceso de poda (S3002); cuando el tamaño del bloque actual es mayor que el umbral (NO en S3001), generan la lista de candidatos a vectores realizando el primer proceso de poda y registrando el candidato a vector HMVP en la lista de candidatos a vector desde la tabla HMVP (S3003); y codifican el bloque actual usando la lista de candidatos a vector (S3004).

    ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD
    9.
    发明专利
    ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD 未知

    公开(公告)号：CA3119646A1

    公开(公告)日：2020-07-09

    申请号：CA3119646

    申请日：2019-12-23

    Applicant: PANASONIC IP CORP AMERICA

    Inventor： LIM CHONG SOON ,  SUN HAI WEI ,  TEO HAN BOON ,  LI JING YA ,  KUO CHE-WEI ,  ABE KIYOFUMI ,  TOMA TADAMASA ,  NICHI TAKAHIRO ,  KATO YUSUKE

    IPC: H04N19/117

    Abstract: A coding device (100) that codes coding target blocks of an image is provided with a processor (a1) and memory (a2) that is connected to the processor (a1). The processor (a1) generates, for a motion, a first predicted image having an integer pixel unit on the basis of a motion vector, and uses an interpolation filter to interpolate the values of the minimum pixel positions between a plurality of integer pixels included in the first predicted image, thereby generating a second predicted image, and, on the basis of the second predicted image, codes coding target blocks. Usage of the interpolation filter involves switching between a first interpolation filter and a second interpolation filter in which the number of taps differs from the first interpolation filter.

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