公开(公告)号：DE602004014092D1

公开(公告)日：2008-07-10

申请号：DE602004014092

申请日：2004-01-19

Applicant: ST MICROELECTRONICS NV ,  ST MICROELECTRONICS SRL

Inventor： ZORY JULIEN ,  SPEZIALI FILIPPO

IPC: H03M13/29 ,  H03M13/27 ,  H04B7/216

Abstract: A method and device for handling write access conflicts in interleaving, in particular for high-throughput turbo decoding for wireless communication systems; the device comprises N interleaving buffers (CLk) that are respectively connected to N producers (PRk), an LLR distributor means and N single port target memories (TMk). At any time step, each interleaving buffer receives m LLR inputs from the producers and has to write up to M of these into a register bank (RBk), which comprises W registers. M denotes the maximum number of concurrent write operations supported per time step and W denotes the maximum buffer size. M and W are design parameters and are chosen for the standard case and not for the worst case. m-M producers have to be stalled whenever m is larger than M and m producers have to be stalled whenever a buffer overflow occurs (more than W LLR values). Finally, at any time step one LLR value is fetched from the register bank and written to the SRAM interleaving memory.