公开(公告)号：DE602004014092D1

公开(公告)日：2008-07-10

申请号：DE602004014092

申请日：2004-01-19

Applicant: ST MICROELECTRONICS NV ,  ST MICROELECTRONICS SRL

Inventor： ZORY JULIEN ,  SPEZIALI FILIPPO

IPC: H03M13/29 ,  H03M13/27 ,  H04B7/216

Abstract: A method and device for handling write access conflicts in interleaving, in particular for high-throughput turbo decoding for wireless communication systems; the device comprises N interleaving buffers (CLk) that are respectively connected to N producers (PRk), an LLR distributor means and N single port target memories (TMk). At any time step, each interleaving buffer receives m LLR inputs from the producers and has to write up to M of these into a register bank (RBk), which comprises W registers. M denotes the maximum number of concurrent write operations supported per time step and W denotes the maximum buffer size. M and W are design parameters and are chosen for the standard case and not for the worst case. m-M producers have to be stalled whenever m is larger than M and m producers have to be stalled whenever a buffer overflow occurs (more than W LLR values). Finally, at any time step one LLR value is fetched from the register bank and written to the SRAM interleaving memory.

公开(公告)号：DE602004030991D1

公开(公告)日：2011-02-24

申请号：DE602004030991

申请日：2004-02-17

Applicant: ST MICROELECTRONICS NV

Inventor： WELLIG ARMIN ,  ZORY JULIEN

IPC: H03M13/39 ,  H03M13/13 ,  H03M13/45

公开(公告)号：DE60322550D1

公开(公告)日：2008-09-11

申请号：DE60322550

申请日：2003-12-09

Applicant: ST MICROELECTRONICS NV

Inventor： WELLIG ARMIN ,  ZORY JULIEN

IPC: H03M13/27

Abstract: The invention relates to de-interleaving successive sequences of interleaved data samples extracted from a virtual memory having L0 columns and C0 rows, in particular for high-throughput applications. The method comprises the steps of: receiving each sequence of said interleaved data samples and writing row by row said received sequences of interleaved data samples in a de-interleaving memory array (2) having L rows and C columns, L being superior or equal to L0 and C being superior or equal to C0, and de-interleaving the data samples stored in said de-interleaving memory array (2) sub-array by sub-array, the used predetermined sub-array being a square cluster array having a predetermined number SQ of rows and columns, the number L of rows and the number C of columns of the de-interleaving memory array (2) being multiples of the number SQ of rows and columns. De-interleaving the de-interleaving memory array (2) sub-array by sub-array allows to avoid memory re-use bottleneck and allows to decrease memory access rate.