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    DRIVE CURRENT CONTROL METHOD FOR DC BRUSHLESS MOTOR WITH INDEPENDENT WINDING
    1.
    发明专利
    DRIVE CURRENT CONTROL METHOD FOR DC BRUSHLESS MOTOR WITH INDEPENDENT WINDING 失效

    公开(公告)号：JPH11122978A

    公开(公告)日：1999-04-30

    申请号：JP22277198

    申请日：1998-08-06

    Applicant: ST MICROELECTRONICS SRL

    Inventor： GALBIATI EZIO ,  BOSCOLO MICHELE ,  BERTOLINI LUCA

    IPC: H02P6/08 ,  H02P6/28 ,  H02P6/18

    Abstract: PROBLEM TO BE SOLVED: To control currents of respective windings individually by a method wherein the signals of two detection resistors are compared with a same reference signal to generate logic triggers and signals generated by monostable multivibrator in accordance with the logic triggers, and signals generated by phase switching are supplied to synthetic logic gates which output signals for driving respective half bridges. SOLUTION: A current which flows through a winding A is supplied by turning on transistors T1A and T4A. If the voltage drop of a detection resistor RS2 exceeds a control voltage, the output of a comparator COMP2 triggers a monostable multivibrator ONE2 to change its output to a logic value 1 for a required period. Since an Ina signal and the output signal of the monostable multivibrator ONE2 after the OR process change a gate output OR-a (= drive signal INa) to a logic value 1, the MOS transistor T4A is turned off and a MOS transistor T3A is turned on. Then, the MOS transistors T1A and T4A are turned on to start the increase of a current in the phase winding A. If the voltage drop of the detection resistor RS2 exceeds the control voltage, this cycle is repeated.

    SPEED RECOVERY CIRCUIT FOR DC CURRENT MOTOR
    2.
    发明专利
    SPEED RECOVERY CIRCUIT FOR DC CURRENT MOTOR 审中-公开

    公开(公告)号：JP2002223588A

    公开(公告)日：2002-08-09

    申请号：JP2001354965

    申请日：2001-11-20

    Applicant: ST MICROELECTRONICS SRL

    Inventor： GALBIATI EZIO ,  NESSI MAURIZIO ,  SCHILLACI LUCA

    IPC: G11B21/08 ,  H02P25/034 ,  H02P7/00

    Abstract: PROBLEM TO BE SOLVED: To prevent collision of an arm for supporting a read and/or write head with the end of a stroke position of an inside or an outside of a platter having a hard disk. SOLUTION: A speed recovering circuit for a DC current motor comprises a second means 7, which is suitable to start a second set of transistors MOS3 and MOS4 of an output stage 1 during a first period Tbrk preset to short circuit the motor 2. In this case, the second means 7 is adapted, so as to set a maximum circulating current Ivcm during a prescribed second time period Tact of a function of the value detected by a first means 5 during the first time period Tbrk by setting an output stage 1 to an unbalanced state, when the first period Tbrk is finished and to stop the motor 2 in the shortest time possible.

    METHOD FOR PWM DRIVING BRUSHLESS MOTOR
    3.
    发明专利
    METHOD FOR PWM DRIVING BRUSHLESS MOTOR 失效

    公开(公告)号：JPH11341861A

    公开(公告)日：1999-12-10

    申请号：JP12352099

    申请日：1999-04-30

    Applicant: ST MICROELECTRONICS SRL

    Inventor： GALBIATI EZIO ,  BOSCOLO MICHELE ,  VITI MARCO

    IPC: H02P6/08 ,  H02P6/14

    Abstract: PROBLEM TO BE SOLVED: To reduce switching loss by firmly keeping one of motor windings in low or high saturation periodically for a prescribed duration, applying the voltage of a second line to the other phase winding which is different from a first periodical voltage line, and matching the voltage of respective windings with the first periodical voltage line. SOLUTION: Samples of a voltage value profile are stored in a MEMOR, and a register Kval coefficients of three bytes to be read respectively are reduced in a MUL (numerical value multiplier). The three samples converted into a MUL are subjected to PWM conversion by a BYTE TO PWM, and the output PWM signals of the three samples are inputted into the three half bridge stages constituted of outputs BJT or MOS for providing required power gain. When one of the three values inputted into a converter in a switching phase becomes zero, the respective half bridges become low-saturated in a duty cycle, where a corresponding PWM output signal is 0%. When one of the three values becomes equals to a positive peak value, the respective half bridges become high-saturated in a duty cycle, where a corresponding PWM output signal is 100%. A BEMF DET detects a rotor, and A/C phases are switched for synchronization.

    METHOD AND SYSTEM OF MONITORING CURRENT IN PWM-DRIVEN INDUCTIVE LOAD THROUGH BRIDGE STAGE
    4.
    发明专利
    METHOD AND SYSTEM OF MONITORING CURRENT IN PWM-DRIVEN INDUCTIVE LOAD THROUGH BRIDGE STAGE 失效

    公开(公告)号：JPH11122954A

    公开(公告)日：1999-04-30

    申请号：JP22150998

    申请日：1998-08-05

    Applicant: ST MICROELECTRONICS SRL

    Inventor： GALBIATI EZIO ,  SALINA ALBERTO

    IPC: G01R19/00 ,  H02M7/5387 ,  H02P6/28 ,  H02P25/034 ,  H02M7/48

    Abstract: PROBLEM TO BE SOLVED: To detect the flow of current of an inductive load for generating a voltage signal which is directly proportional to the mean value of a current circulated in the load, without being subjected to the effects of an output change at a power amplifying stage. SOLUTION: A signal existing in a current-detecting resistor Rs connected to load is amplified by a sense amplifier by using a pair of complementary periodic reference signals, and an amplified signals displaying a current in the load to be supplied to an error amplifier, which drives a power amplifier at a bridge stage is generated, thus monitoring a current lowering through the inductive load LOAD driven through a power amplifying state in a PWM mode. A load current is sampled by a sample-holding circuit containing a sampling switch SW and a capacitor Csh for storage in the method. The mean value of the load current is monitored by closing the switch by synchronized pulses, coinciding at the midpoint of an active period and the midpoint of a current recirculating period and sampling the load current at these midpoints.

    APPARATUS AND METHOD FOR INCREASING MINUTENESS UPON CONVERSION OF DIGITAL DATA INTO FULL-BRIDGE OUTPUT STAGE DRIVING PWM SIGNAL
    5.
    发明专利
    APPARATUS AND METHOD FOR INCREASING MINUTENESS UPON CONVERSION OF DIGITAL DATA INTO FULL-BRIDGE OUTPUT STAGE DRIVING PWM SIGNAL 失效

    公开(公告)号：JPH11103586A

    公开(公告)日：1999-04-13

    申请号：JP20384998

    申请日：1998-07-17

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MAIOCCHI GIUSEPPE ,  GALBIATI EZIO

    IPC: H02M7/5387 ,  H02P6/08 ,  H02P7/06 ,  H03M1/82 ,  H02M7/48

    Abstract: PROBLEM TO BE SOLVED: To improve current control of an actuator by utilizing an up-down signal of a counter and two least significant bits (LBS) to select one set of data to be compared from four data values, thereby improving minuteness. SOLUTION: A *VAL value of a corrected value of a VAL value is calculated from the VAL value. Two selected digital values are input to respective two N-bit registers. Numeric values increased by '1' are stored in another two N-bit registers. The two LBSs of the input values are sent to a multiplexer, which, in turn, decides three intermediate levels between the two values dynamically indicated by N bits. Two complement LSBs are sent to a least digital circuit which, in turn, judges how long a basic duty cycle is elongated or contracted. Thus, a duty cycle different according to the two LSB values of a reference signal to be converted or a counting direction is formed. As a result, high minuteness can be performed.

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