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公开(公告)号:JPH1175388A
公开(公告)日:1999-03-16
申请号:JP19939898
申请日:1998-07-15
Applicant: ST MICROELECTRONICS SRL
Inventor: VITI MARCO , BOSCOLO MICHELE , SALINA ALBERTO
Abstract: PROBLEM TO BE SOLVED: To realize a rotor position detection system of a multiphase brushless DC motor which is driven with a mode of supplying power to all phase windings. SOLUTION: In the rotor position detection method of a multiphase brushless motor which is driven with a multipole mode and has a zero-cross detection circuit for induction signals in phase windings, the driving signal in the phase winding of the motor which is connected to the zero-cross detection circuit is interrupted by using a 1st logic command (ENABLE). At a certain lapse of time after the start of the interruption, a logic gate which recognizes the zero-cross detected by the zero-cross detection circuit is enabled by using a 2nd logic command (MAK). Then, at a certain lapse of time after the start of the interruption, both the logic commands (ENABLE and MASK) are reset.
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公开(公告)号:JPH11122954A
公开(公告)日:1999-04-30
申请号:JP22150998
申请日:1998-08-05
Applicant: ST MICROELECTRONICS SRL
Inventor: GALBIATI EZIO , SALINA ALBERTO
IPC: G01R19/00 , H02M7/5387 , H02P6/28 , H02P25/034 , H02M7/48
Abstract: PROBLEM TO BE SOLVED: To detect the flow of current of an inductive load for generating a voltage signal which is directly proportional to the mean value of a current circulated in the load, without being subjected to the effects of an output change at a power amplifying stage. SOLUTION: A signal existing in a current-detecting resistor Rs connected to load is amplified by a sense amplifier by using a pair of complementary periodic reference signals, and an amplified signals displaying a current in the load to be supplied to an error amplifier, which drives a power amplifier at a bridge stage is generated, thus monitoring a current lowering through the inductive load LOAD driven through a power amplifying state in a PWM mode. A load current is sampled by a sample-holding circuit containing a sampling switch SW and a capacitor Csh for storage in the method. The mean value of the load current is monitored by closing the switch by synchronized pulses, coinciding at the midpoint of an active period and the midpoint of a current recirculating period and sampling the load current at these midpoints.
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公开(公告)号:JPH11215885A
公开(公告)日:1999-08-06
申请号:JP30054498
申请日:1998-10-22
Applicant: ST MICROELECTRONICS SRL
Inventor: SALINA ALBERTO , BRAMBILLA DONATELLA
IPC: H02P7/03 , H02P25/034 , H02P7/00
Abstract: PROBLEM TO BE SOLVED: To provide a current mode PWM(pulse width modulation) driving device whose precision does not deteriorate even if it is miniaturized. SOLUTION: A control loop becoming a close sate with the input node (A) of an error amplifier comparing the voltage of the input mode (A) balancing second current amplified by the output voltage V sense of a current sensing amplifier inputting first current amplified by control voltage Vdac via a first resistor R1 and the voltage drop quantity of a current detection resistor R3 via a second resistor R2 with reference voltage Vref is provided. In a current mode PWM driving device, voltage drop quantity is smaller than that by the current detection resistor R3. The current sense amplifier is constituted of an operational amplifier OP operating as a buffer or a charge transfer circuit by switches swA, swB, swC and sw1 controlled by a pair of complementary control signals ϕ1 and ϕ2 and a sample-and-hold output stage.
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公开(公告)号:JPH07263971A
公开(公告)日:1995-10-13
申请号:JP6682295
申请日:1995-02-28
Applicant: ST MICROELECTRONICS SRL
Inventor: CHRAPPAN FRANCESCO , NESSI MAURIZIO , SALINA ALBERTO
IPC: H03F3/20 , H02P25/034 , H03F1/32 , H03F3/30 , H03F3/347
Abstract: PURPOSE: To effectively control the operation of an externally connected output power transistor(TR) by directly driving it with the output of an operational amplifier without using any external sense resistance. CONSTITUTION: A buffer stage BF1 shifts its input voltage toward a ground potential by a value equal to the threshold voltage of M2 under a zero-input condition. Therefore, the gate-source voltage of the external power transistor TRM 4 which is driven by the buffer becomes zero under the zero-input condition and its turn-off state is secured. As the current which is led out by the load increases, the output voltage VOP1 of a signal amplifier OP1 increases and a TRM2 is placed nearly in its saturated state. Here, when the current that the load requires becomes larger than the limit current IM2 passing through the M2, a maximum current like this which passes through the M2 is limited by a resistance R, so the output voltage of the signal amplifier OP1 increases until it meets a condition of VBF1 >Vth M4 +V0 and an external power TR is turned off.
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公开(公告)号:DE69831776D1
公开(公告)日:2006-02-16
申请号:DE69831776
申请日:1998-07-09
Applicant: ST MICROELECTRONICS SRL
Inventor: VITI MARCO , BOSCOLO MICHELE , SALINA ALBERTO
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公开(公告)号:DE69728388D1
公开(公告)日:2004-05-06
申请号:DE69728388
申请日:1997-08-11
Applicant: ST MICROELECTRONICS SRL
Inventor: GALBIATI EZIO , SALINA ALBERTO
IPC: G01R19/00 , H02M7/5387 , H02P6/28 , H02P25/034
Abstract: The monitoring the current lowing through an inductive load driven through a bridge power stage in a PWM mode, by using a pair of complementary periodic reference signals and amplifying by a sensing amplifier the signal existing on of a current sensing resistor functionally connected in series with the load, for producing an amplified signal representative of the current in the load to be fed to an input of an error amplifier driving a power amplifier of said bridge stage, comprises sampling the signal output by the sensing amplifier with a Sample & Hold circuit comprising a sampling switch and a storing capacitor. The average value of the current in the load in monitored by sampling at an instant half way an active driving phase and at an instant half way a current recirculation phase by closing the switch with a synchronizing pulse that coincides with the half instant of said phases of operation. The synchronizing pulse is generated in coincidence with the peak and with the virtual zero crossing of said two reference periodic signals, outphased by 180 degrees. A two-input logic AND gate, combining said synchronizing pulse and a masking signal of a preestablished duration generated at every switching of said bridge stage may also be employed.
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公开(公告)号:DE69704709T2
公开(公告)日:2001-08-09
申请号:DE69704709
申请日:1997-10-23
Applicant: ST MICROELECTRONICS SRL
Inventor: SALINA ALBERTO , BRAMBILLA DONATELLA
IPC: H02P7/03 , H02P25/034 , H02P7/00
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公开(公告)号:DE69704709D1
公开(公告)日:2001-06-07
申请号:DE69704709
申请日:1997-10-23
Applicant: ST MICROELECTRONICS SRL
Inventor: SALINA ALBERTO , BRAMBILLA DONATELLA
IPC: H02P7/03 , H02P25/034 , H02P7/00
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公开(公告)号:DE69414820D1
公开(公告)日:1999-01-07
申请号:DE69414820
申请日:1994-02-28
Applicant: ST MICROELECTRONICS SRL
Inventor: CHRAPPAN FRANCESCO , NESSI MAURIZIO , SALINA ALBERTO
IPC: H03F3/20 , H02P25/034 , H03F1/32 , H03F3/30 , H03F3/347
Abstract: The operation of externally connected output power transistors of a class AB amplifier is controlled without employing any external sensing resistance of the output current by driving an externally connected power transistor through a level shifting buffer and employing a limiting network composed of an integrated transistor driven by the output of a signal amplifying stage and a resistance connected in series with its drain. The buffer stage shifts the level of the driving signal of the external power transistor by a value equal to the threshold voltage of the integrated transistor of the limiting network thus ensuring the turn-off of the external power transistor under quiescent conditions.
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公开(公告)号:DE69831776T2
公开(公告)日:2006-08-17
申请号:DE69831776
申请日:1998-07-09
Applicant: ST MICROELECTRONICS SRL
Inventor: VITI MARCO , BOSCOLO MICHELE , SALINA ALBERTO
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