OUTPUT STAGE FOR INTEGRATED AMPLIFIER WITH OUTPUT POWER DEVICE HAVING OUTSIDE CONNECTION

    公开(公告)号:JPH07263971A

    公开(公告)日:1995-10-13

    申请号:JP6682295

    申请日:1995-02-28

    Abstract: PURPOSE: To effectively control the operation of an externally connected output power transistor(TR) by directly driving it with the output of an operational amplifier without using any external sense resistance. CONSTITUTION: A buffer stage BF1 shifts its input voltage toward a ground potential by a value equal to the threshold voltage of M2 under a zero-input condition. Therefore, the gate-source voltage of the external power transistor TRM 4 which is driven by the buffer becomes zero under the zero-input condition and its turn-off state is secured. As the current which is led out by the load increases, the output voltage VOP1 of a signal amplifier OP1 increases and a TRM2 is placed nearly in its saturated state. Here, when the current that the load requires becomes larger than the limit current IM2 passing through the M2, a maximum current like this which passes through the M2 is limited by a resistance R, so the output voltage of the signal amplifier OP1 increases until it meets a condition of VBF1 >Vth M4 +V0 and an external power TR is turned off.

    2.
    发明专利
    未知

    公开(公告)号:DE69414820T2

    公开(公告)日:1999-04-15

    申请号:DE69414820

    申请日:1994-02-28

    Abstract: The operation of externally connected output power transistors of a class AB amplifier is controlled without employing any external sensing resistance of the output current by driving an externally connected power transistor through a level shifting buffer and employing a limiting network composed of an integrated transistor driven by the output of a signal amplifying stage and a resistance connected in series with its drain. The buffer stage shifts the level of the driving signal of the external power transistor by a value equal to the threshold voltage of the integrated transistor of the limiting network thus ensuring the turn-off of the external power transistor under quiescent conditions.

    3.
    发明专利
    未知

    公开(公告)号:DE69414820D1

    公开(公告)日:1999-01-07

    申请号:DE69414820

    申请日:1994-02-28

    Abstract: The operation of externally connected output power transistors of a class AB amplifier is controlled without employing any external sensing resistance of the output current by driving an externally connected power transistor through a level shifting buffer and employing a limiting network composed of an integrated transistor driven by the output of a signal amplifying stage and a resistance connected in series with its drain. The buffer stage shifts the level of the driving signal of the external power transistor by a value equal to the threshold voltage of the integrated transistor of the limiting network thus ensuring the turn-off of the external power transistor under quiescent conditions.

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