公开(公告)号：EP0658938B1

公开(公告)日：2001-08-08

申请号：EP93830505.9

申请日：1993-12-15

Applicant: STMicroelectronics S.r.l.

Inventor： Contiero, Claudio ,  Manzini, Stefano ,  Cavioni, Tiziana

IPC: H01L27/105 ,  H01L27/088 ,  H01L27/06

CPC classification number: H01L27/105 ,  H01L27/0623 ,  H01L27/0922

公开(公告)号：EP1296380B1

公开(公告)日：2007-11-28

申请号：EP01830595.3

申请日：2001-09-20

Applicant: STMicroelectronics S.r.l.

Inventor： Depetro, Riccardo ,  Manzini, Stefano

IPC: H01L29/94

CPC classification number: H01L29/417 ,  H01L29/94

公开(公告)号：EP1577952A1

公开(公告)日：2005-09-21

申请号：EP04100960.6

申请日：2004-03-09

Applicant: STMicroelectronics S.r.l.

Inventor： Depetro, Riccardo ,  Manzini, Stefano

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/417 ,  H01L21/336

CPC classification number: H01L29/66636 ,  H01L21/26586 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/66681 ,  H01L29/66696 ,  H01L29/7816

Abstract: An insulated gate field-effect transistor (100;300) is proposed, including a body region (115) of a first conductivity type formed in a semiconductor material layer (105) in correspondence of the front surface, a gate electrode (112) disposed over the body region with interposition of a gate dielectric (110), and a source region (120,145;320,145) and a drain region (125,150) of second conductivity type opposite to the first conductivity type, respectively formed in the body region and the semiconductor material layer. The source and drain region are provided spaced apart from each other by a channel zone (130) in a portion of the body region underlying the gate electrode, and a drift portion (135) of the semiconductor material layer between the channel zone and the drain region, the insulated gate extending over the drift portion. The drain region is located at a depth compared to a top surface of the semiconductor material layer to move charge carriers in the drift portion away from an interface between the semiconductor material layer and the gate dielectric.

Abstract translation: 一种绝缘栅晶体管，包括具有前表面的半导体材料层，主体区域，设置在主体区域上的绝缘栅极，插入栅极电介质，以及源极和漏极区域，源区域形成在体区中 和形成在半导体材料层中的漏极区。 源极和漏极区域通过绝缘栅极下方的主体区域的一部分中的沟道区彼此间隔开，并且半导体材料层的电荷载流子漂移部分在沟道区域和漏极区域之间，绝缘栅极 在电荷载流子漂移部分上延伸。 漏极区域位于与前表面相比的深度处，以使电荷载流子在电荷载流子漂移部分中远离半导体材料层和栅极电介质之间的界面移动。

公开(公告)号：EP1024538A1

公开(公告)日：2000-08-02

申请号：EP99830044.6

申请日：1999-01-29

Applicant: STMicroelectronics S.r.l.

Inventor： Manzini, Stefano ,  Erratico, Pietro

IPC: H01L29/94

CPC classification number: H01L29/94

Abstract: A varactor (30) has a gate region (6), a first and a second biasing region (5a, 5b) of N + type, embedded in a well (4), and a first and a second extraction region (15a, 15b) of P + type, forming a pair of PN junctions (16a, 16b) with the well (4). The PN junctions (16a, 16b) are inversely biased and extract charge accumulating in the well (4), below the gate region (6), when the gate region (6) is biased to a lower voltage (V G ) than a predetermined threshold value.

Abstract translation: 变容二极管（30）具有栅极区域（6），N +型的第一和第二偏置区域（5a，5b），嵌入阱（4），以及第一和第二提取区域 ，15b），与阱（4）形成一对PN结（16a，16b）。 当栅极区域（6）被偏置到比预定阈值更低的电压（VG）时，PN结（16a，16b）被反向偏置并且提取电荷累积在阱（4）中，在栅极区域（6） 值。

公开(公告)号：EP1296380A1

公开(公告)日：2003-03-26

申请号：EP01830595.3

申请日：2001-09-20

Applicant: STMicroelectronics S.r.l.

Inventor： Depetro, Riccardo ,  Manzini, Stefano

IPC: H01L29/94

CPC classification number: H01L29/417 ,  H01L29/94

Abstract: High-Q, variable capacitance capacitor (20, 20'), comprising a pocket (22) of semiconductor material; a field insulating layer (23), covering the pocket; an opening (24) in the field insulating layer, delimiting a first active area (24); an access region (25) formed in the active area and extending at a distance from a first edge (24a) of the active area and adjacent to a second edge (24b) of the active area. A portion (26) of the pocket (22) is comprised between the access region (15) and the first edge (24a) and forms a first armature; an insulating region (30) extends above the portion (26) of said body, and a polysilicon region (31) extends above the insulating region (30) and forms a second armature. A portion of the polysilicon region extends above the field insulating layer (23), parallel to the access region (25); a plurality of contacts (32) are formed at a mutual distance along the portion of the polysilicon region (31) extending above the field insulating layer (23).

Abstract translation: 高Q型可变容性电容器（20,20'），包括半导体材料的凹穴（22）; 覆盖所述口袋的场绝缘层（23）; 在所述场绝缘层中的开口（24），限定第一有效区域（24）; 形成在有源区域中并且与有源区域的第一边缘（24a）一定距离并且与有源区域的第二边缘（24b）相邻延伸的访问区域（25）。 袋（22）的一部分（26）包括在接近区（15）和第一边（24a）之间并形成第一电枢; 绝缘区域（30）在所述主体的部分（26）上方延伸，并且多晶硅区域（31）在绝缘区域（30）上延伸并形成第二电枢。 多晶硅区域的一部分平行于接入区域（25）延伸到场绝缘层（23）的上方。 多个触点（32）沿着在场绝缘层（23）上方延伸的多晶硅区域（31）的部分相互间隔地形成。