Abstract:
A toggle flip-flop (FFT) with reduced integration area, comprising a flip-flop of the D type with an inverting input stage (T,A,B,C) and a master-slave portion. Three transistors (M 1 ,M 2 ,M 3 ) connected to the inverting stage form a logic gate of the XOR type whereto the output terminal (Q) of the master-slave portion is fed back.
Abstract:
The synchronizing circuit of a digital drive system of an electric motor is configured to function in a closed loop or in an open loop mode by adding a minimum number of elements to the normal scheme of a closed loop synchronizing circuit. In practice, by adding only one programmable register and a pair of two-input de-multiplexers, the system is able to automatically switch from one mode of operation to the other mode. The programmable open loop mode permits to compensate for the phase angle between the current flowing through the windings and the drive voltage applied thereto, in case of a voltage mode driving.