公开(公告)号：EP1426967A2

公开(公告)日：2004-06-09

申请号：EP03104383.9

申请日：2003-11-26

Applicant: STMicroelectronics S.r.l.

Inventor： Micheloni, Rino ,  Ravasto, Roberto ,  Scommegna, Salvatrice

IPC: G11C11/56

CPC classification number: G11C16/3459 ,  G11C11/5628 ,  G11C16/3454 ,  G11C2211/5621

Abstract: A method of programming an electrically programmable memory comprises: accessing a group of memory cells ( MC1-MCk ) of the memory to ascertain a programming state thereof ( 401,407;503,509a,513a ); applying a programming pulse to those memory cells in the group whose programming state is not ascertained to correspond to a desired programming state ( 405;507a,509c,513c ); and repeating said acts of accessing and applying for the memory cells in the group whose programming state is not ascertained ( 411;509b,513b ). After the programming state of a prescribed number of memory cells in the group has been ascertained, the memory cells in the group are accessed again and the programming state of the memory cells whose programming state was previously ascertained is re-ascertained ( 413,415;515 ); at least one additional programming pulse is applied to those memory cells in the group whose programming state is not re-ascertained ( 405;507a,509c,513c ). The method guarantees that the programming state of the memory cells is ascertained in conditions that closely resembles, or are substantially identical, to the conditions in which the memory cells will be accessed in a standard read.

Abstract translation: 一种对电可编程存储器进行编程的方法包括：访问存储器的一组存储单元（MC1-MCk）以确定其编程状态（401,407; 503,509a，513a）; 将编程脉冲施加到其编程状态未被确定为对应于期望的编程状态（405; 507a，509c，513c）的组中的那些存储器单元; 并且重复所述访问和应用编程状态未被确定的组中的存储器单元的行为（411; 509b，513b）。 在确定了该组中规定数量的存储单元的编程状态之后，再次访问该组中的存储单元，并重新确定编程状态先前确定的存储单元的编程状态（413,415; 515） ; 至少一个附加编程脉冲被施加到其编程状态未被重新确定的组中的那些存储器单元（405; 507a，509c，513c）。 该方法保证了在与标准读取中存储单元将被访问的条件非常相似或基本相同的条件下确定存储单元的编程状态。

公开(公告)号：EP1426967A3

公开(公告)日：2007-06-20

申请号：EP03104383.9

申请日：2003-11-26

Applicant: STMicroelectronics S.r.l.

Inventor： Micheloni, Rino ,  Ravasto, Roberto ,  Scommegna, Salvatrice

IPC: G11C11/56 ,  G11C16/10 ,  G11C16/34

CPC classification number: G11C16/3459 ,  G11C11/5628 ,  G11C16/3454 ,  G11C2211/5621

Abstract: A method of programming an electrically programmable memory comprises: accessing a group of memory cells ( MC1-MCk ) of the memory to ascertain a programming state thereof ( 401,407;503,509a,513a ); applying a programming pulse to those memory cells in the group whose programming state is not ascertained to correspond to a desired programming state ( 405;507a,509c,513c ); and repeating said acts of accessing and applying for the memory cells in the group whose programming state is not ascertained ( 411;509b,513b ). After the programming state of a prescribed number of memory cells in the group has been ascertained, the memory cells in the group are accessed again and the programming state of the memory cells whose programming state was previously ascertained is re-ascertained ( 413,415;515 ); at least one additional programming pulse is applied to those memory cells in the group whose programming state is not re-ascertained ( 405;507a,509c,513c ). The method guarantees that the programming state of the memory cells is ascertained in conditions that closely resembles, or are substantially identical, to the conditions in which the memory cells will be accessed in a standard read.

公开(公告)号：EP1265252A1

公开(公告)日：2002-12-11

申请号：EP01830369.3

申请日：2001-06-05

Applicant: STMicroelectronics S.r.l.

Inventor： Micheloni, Rino ,  Campardo, Giovanni ,  Scommegna, Salvatrice

IPC: G11C16/34

CPC classification number: G11C16/344 ,  G11C16/3436

Abstract: Described herein is an erasure method for an electrically erasable nonvolatile memory device (1), in particular an EEPROM-FLASH nonvolatile memory device, comprising a memory array (3) formed by a plurality of memory cells (8) arranged in rows and columns and grouped in sectors (4) each formed by a plurality of subsectors (6), which are in turn formed by one or more rows. Erasure of the memory array (3) is performed by sectors and for each sector (4) envisages applying an erasure pulse to the gate terminals of all the memory cells (8) of the sector (4), verifying erasure of the memory cells (8) of each subsector (6), and applying a further erasure pulse to the gate terminals of the memory cells (8) of only the subsectors (6) not completely erased.

Abstract translation: 在所描述的是用于向电可擦除非易失性存储器设备（1），尤其是EEPROM-FLASH非易失性存储器件的擦除方法，其包括存储器阵列（3）通过（8）布置成行和列的存储单元的多个形成 在扇区分组（4），每个由子行业的多个形成，（6），其又通过一个或多个列构成。 存储器阵列（3）的擦除执行通过扇区和每个扇区（4）设想适用于擦除脉冲到所有的存储单元的栅极端子（8）的扇区（4）的验证的存储器单元的擦除（ 8）每个分部门（6），以及将另外的擦除脉冲施加到存储单元的栅极端子（8）仅分部门（6）未完全呼叫擦除。