公开(公告)号：HK1224275A1

公开(公告)日：2017-08-18

申请号：HK16112582

申请日：2016-11-02

Applicant: SILEX MICROSYSTEMS AB

Inventor： KLVESTEN EDVARD ,  EBEFORS THORBJRN ,  SVEDIN NIKLAS

IPC: B81B20060101 ,  B81C20060101 ,  H01L20060101

公开(公告)号：SE538311C2

公开(公告)日：2016-05-10

申请号：SE1351530

申请日：2013-12-19

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJÖRN ,  KÄLVESTEN EDVARD

IPC: H01L21/50 ,  B81B7/00 ,  B81C1/00 ,  H01L23/48

公开(公告)号：SE538058C2

公开(公告)日：2016-02-23

申请号：SE1250323

申请日：2012-03-30

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJÖRN ,  PERTTU DANIEL

IPC: H01L23/48 ,  H01L21/768

公开(公告)号：SE537869C2

公开(公告)日：2015-11-03

申请号：SE1251236

申请日：2012-11-01

Applicant: SILEX MICROSYSTEMS AB

Inventor： KÄLVESTEN EDVARD ,  ERLESAND ULF

IPC: H01L21/768 ,  B81B1/00 ,  B81C1/00 ,  H01L21/48 ,  H01L23/48 ,  H01L23/538

公开(公告)号：SE1251236A1

公开(公告)日：2014-05-02

申请号：SE1251236

申请日：2012-11-01

Applicant: SILEX MICROSYSTEMS AB

Inventor： KÄLVESTEN EDVARD ,  ERLESAND ULF

IPC: H01L21/768 ,  B81B1/00 ,  B81C1/00 ,  H01L21/48 ,  H01L23/48 ,  H01L23/538

公开(公告)号：SE1250323A1

公开(公告)日：2013-10-01

申请号：SE1250323

申请日：2012-03-30

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJOERN ,  PERTTU DANIEL

IPC: H01L23/48 ,  H01L21/768

公开(公告)号：SE1150429A1

公开(公告)日：2012-11-13

申请号：SE1150429

申请日：2011-05-12

Applicant: SILEX MICROSYSTEMS AB

Inventor： KAELVESTEN EDVARD

IPC: B01L3/00 ,  G01N21/05 ,  G01N35/08

公开(公告)号：SE534510C2

公开(公告)日：2011-09-13

申请号：SE0850083

申请日：2008-11-19

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJOERN ,  KAELVESTEN EDVARD ,  BAUER TOMAS

IPC: B81B7/00 ,  B81C1/00 ,  H01L21/50 ,  H01L23/48

公开(公告)号：SE0850083A1

公开(公告)日：2010-05-20

申请号：SE0850083

申请日：2008-11-19

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS THORBJOERN ,  KAELVESTEN EDVARD ,  BAUER TOMAS

IPC: B81C1/00 ,  B81B7/00 ,  H01L21/50 ,  H01L23/48

公开(公告)号：SE0801620L

公开(公告)日：2008-10-30

申请号：SE0801620

申请日：2007-01-31

Applicant: SILEX MICROSYSTEMS AB

Inventor： KAELVESTEN EDVARD ,  BAUER TOMAS ,  EBEFORS THORBJOERN

Abstract: The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (140; 192). It comprises providing a wafer (110; 150) having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistivity material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections (140; 192). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections. Also there is provided a wafer substrate for making integrated electronic circuits and/or components, comprising a low resistivity silicon base (110) having a high resistivity top layer (122) suitable for semiconductor engineering, characterized by having low resistivity wafer through connections (140).