公开(公告)号：US20230397333A1

公开(公告)日：2023-12-07

申请号：US17833568

申请日：2022-06-06

Applicant: Intel Corporation

Inventor： Eng Huat GOH ,  Chee Kheong YOON ,  Telesphor KAMGAING ,  Jooi Wah WONG ,  Min Suet LIM ,  Kavitha NAGARAJAN ,  Chan Kim LEE ,  Chu Aun LIM

IPC: H05K1/11 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/115 ,  H05K3/429 ,  H05K3/4644 ,  H05K2201/09827 ,  H05K2201/0275 ,  H05K2203/107 ,  H05K2203/02 ,  H05K2201/09854

Abstract: Embodiments disclosed herein include package substrates. In an embodiment, the package substrate comprises a core. In an embodiment, the core comprises a first sub-core layer and a second sub-core layer. In an embodiment, a via is provided through the first sub-core layer and the second sub-core layer. In an embodiment, the via comprises a first hourglass shape in the first sub-core layer and a second hourglass shape in the second sub-core layer. In an embodiment, a front-side buildup layer is over the core and a backside buildup layer is under the core.

公开(公告)号：US20230395576A1

公开(公告)日：2023-12-07

申请号：US17833589

申请日：2022-06-06

Applicant: Intel Corporation

Inventor： Eng Huat GOH ,  Telesphor KAMGAING ,  Chee Kheong YOON ,  Jooi Wah WONG ,  Min Suet LIM ,  Kavitha NAGARAJAN ,  Chu Aun LIM

IPC: H01L25/10 ,  H01L25/065 ,  H01L23/16 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L25/105 ,  H01L25/0657 ,  H01L23/16 ,  H01L2225/06586 ,  H01L25/50 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L23/562

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a package substrate with a first memory die stack on the package substrate, and a second memory die stack on the package substrate. In an embodiment, an electrically insulating layer is provided over the first memory die stack and the second memory die stack. In an embodiment, an opening is provided through the electrically insulating layer, and a die module is in the opening over the package substrate.

公开(公告)号：US20230246338A1

公开(公告)日：2023-08-03

申请号：US18133361

申请日：2023-04-11

Applicant: Intel Corporation

Inventor： Feras EID ,  Sasha N. OSTER ,  Telesphor KAMGAING ,  Georgios C. DOGIAMIS ,  Aleksandar ALEKSOV

IPC: H01Q9/04 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495 ,  H01L23/552 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H01Q1/52 ,  H01Q19/22

CPC classification number: H01Q9/0414 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/552 ,  H01L23/66 ,  H01Q1/2283 ,  H01Q1/241 ,  H01Q1/526 ,  H01Q19/22 ,  H01L23/3675

Abstract: Embodiments of the invention include a microelectronic device that includes a first substrate having radio frequency (RF) components and a second substrate that is coupled to the first substrate. The second substrate includes a first conductive layer of an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher. A mold material is disposed on the first and second substrates. The mold material includes a first region that is positioned between the first conductive layer and a second conductive layer of the antenna unit with the mold material being a dielectric material to capacitively couple the first and second conductive layers of the antenna unit.

公开(公告)号：US20230208010A1

公开(公告)日：2023-06-29

申请号：US17561733

申请日：2021-12-24

Applicant: Intel Corporation

Inventor： Georgios C. DOGIAMIS ,  Aleksandar ALEKSOV ,  Veronica STRONG ,  Telesphor KAMGAING ,  Neelam PRABHU GAUNKAR ,  Brandon RAWLINGS

IPC: H01Q1/22 ,  H01Q13/10 ,  H01L23/498

CPC classification number: H01Q1/2283 ,  H01Q13/10 ,  H01L23/49822 ,  H05K1/181

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a core, where the core comprises glass. In an embodiment, an electromagnetic wave launcher is embedded in the core. In an embodiment, the electromagnetic wave launcher comprises a fin, where the fin is a conductive material, and where the fin comprises a stepped profile.

公开(公告)号：US20230207493A1

公开(公告)日：2023-06-29

申请号：US17561578

申请日：2021-12-23

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Aleksandar ALEKSOV ,  Veronica STRONG ,  Neelam PRABHU GAUNKAR ,  Brandon RAWLINGS ,  Gerogios C. DOGIAMIS

IPC: H01L23/64 ,  H01L23/15 ,  H01L23/498

CPC classification number: H01L23/645 ,  H01L23/15 ,  H01L23/49827

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a substrate, where the substrate comprises glass. In an embodiment, a magnetic ring is embedded in the substrate. In an embodiment, a loop is around the magnetic ring. In an embodiment, the loop is conductive and comprises a first via through the substrate, a second via through the substrate, and a trace over a surface of the substrate, where the trace electrically couples the first via to the second via.

公开(公告)号：US20230207408A1

公开(公告)日：2023-06-29

申请号：US17561735

申请日：2021-12-24

Applicant: Intel Corporation

Inventor： Georgios C. DOGIAMIS ,  Aleksandar ALEKSOV ,  Telesphor KAMGAING ,  Neelam PRABHU GAUNKAR ,  Brandon RAWLINGS ,  Veronica STRONG

IPC: H01L23/15 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/15 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L21/486 ,  H01L24/16 ,  C03C23/0025

Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, an electronic package comprises a core. In an embodiment, the core comprises glass. In an embodiment, a blind via is provided into the core. In an embodiment, a plate spans across the blind via.

公开(公告)号：US20230207407A1

公开(公告)日：2023-06-29

申请号：US17561734

申请日：2021-12-24

Applicant: Intel Corporation

Inventor： Georgios C. DOGIAMIS ,  Telesphor KAMGAING ,  Brandon RAWLINGS ,  Neelam PRABHU GAUNKAR ,  Veronica STRONG ,  Aleksandar ALEKSOV

IPC: H01L23/15 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/15 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L21/486 ,  H01L24/16 ,  C03C23/0025

Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, an electronic package comprises a core, where the core comprises glass. In an embodiment, a via opening is formed through the core. In an embodiment, the via opening has an aspect ratio (depth:width) that is approximately 5:1 or greater. In an embodiment, the electronic package further comprises a via in the via opening, where the via opening is fully filled.

公开(公告)号：US20230197541A1

公开(公告)日：2023-06-22

申请号：US17557913

申请日：2021-12-21

Applicant: Intel Corporation

Inventor： Veronica STRONG ,  Telesphor KAMGAING ,  Aleksandar ALEKSOV ,  Georgios C. DOGIAMIS ,  Brandon RAWLINGS ,  Neelam PRABHU GAUNKAR

IPC: H01L23/15 ,  H01L23/48 ,  H01L23/498

CPC classification number: H01L23/15 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49816

Abstract: Embodiments disclosed herein include an electronic package that comprises a substrate with a first surface and a second surface opposite from the first surface. In an embodiment, the substrate comprises glass. In an embodiment, the electronic package further comprises an opening through the substrate from the first surface to the second surface, where the opening comprises a first end proximate to the first surface of the substrate, a second end proximate to the second surface of the substrate, and a middle region between the first end and the second end. In an embodiment, the middle region has a discontinuous slope at junctions with the first end and the second end.

公开(公告)号：US20230097236A1

公开(公告)日：2023-03-30

申请号：US17485287

申请日：2021-09-24

Applicant: Intel Corporation

Inventor： Andrew COLLINS ,  Aleksandar ALEKSOV ,  Srinivas V. PIETAMBARAM ,  Tarek A. IBRAHIM ,  Telesphor KAMGAING ,  Arghya SAIN ,  Sivaseetharaman PANDI

IPC: H01L23/498 ,  H01L23/15 ,  H01L23/00

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a package substrate, where the package substrate comprises: a core substrate. In an embodiment, the core substrate comprises glass. In an embodiment, a via passes through the core substrate. In an embodiment, a die is coupled to the package substrate, where the die comprises an IO interface. In an embodiment, the IO interface is electrically coupled to the via and the via is within a footprint of the die.

公开(公告)号：US20220407203A1

公开(公告)日：2022-12-22

申请号：US17350169

申请日：2021-06-17

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Veronica STRONG ,  Georgios C. DOGIAMIS ,  Neelam PRABHU GAUNKAR ,  Aleksandar ALEKSOV

IPC: H01P3/06 ,  H01L49/02 ,  H01L23/15 ,  H01L23/498 ,  H01L23/66 ,  H01L21/48 ,  H01P11/00

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to creating coaxial structures within glass package substrates. These techniques, in embodiments, may be extended to create other structures, for example capacitors within glass substrates. Other embodiments may be described and/or claimed.