VIDEO SIGNAL PROCESSING DEVICE
    102.
    发明专利

    公开(公告)号:JPS61161877A

    公开(公告)日:1986-07-22

    申请号:JP295785

    申请日:1985-01-11

    Applicant: SONY CORP

    Abstract: PURPOSE:To display plural pictures in division on the displaying screen by writing the primary and secondary digital video signals in alternate addresses of the line memory to read them alternately and display. CONSTITUTION:The primary-color signals supplied to input terminals 1-3 and 4-6 are supplied alternately to an A/D converting circuit 8 by the switching of switches 7a-7c, and is written in the line memory 9 by the write address signal given through a memory control circuit 70. In the mean time, a write- address counter 11 is sequentially generating the address signals. The data correspondent to the picture A is written in the addresses of the line memory by the address signals in the even number of order and that correspondent to the picture B is by ones in the odd number of order. The data written in the line memory 9 is read out by the read-address signals which the memory control circuit 10 controls to supply, and is outputted through a D/A converting circuit 15.

    DIGITAL PROCESSING UNIT OF ANALOG SIGNAL

    公开(公告)号:JPS61144126A

    公开(公告)日:1986-07-01

    申请号:JP26698484

    申请日:1984-12-18

    Applicant: SONY CORP

    Abstract: PURPOSE:To attain apparent high speed processing while keeping low speed clock by applying signal processing at a position interpolated mutually and synthesizing the processing results so as to obtain an output signal. CONSTITUTION:A signal from an input terminal 1 is fed to two AD converting circuits 3a, 3b via a low pass filter 2. Further, the signal from the input terminal 1 is fed to an oscillator 4 to form a clock signal phi, which is fed to the AD converting circuit 3a, the signal is inverted by an inverter 5 for the phase and a signal phi' is fed to the AD converting circuit 3b. The converted digital signal is fed respectively to double speed processing circuits 6a, 6b and the processed digital signal respectively is fed to DA converting circuits 7a, 7b. The analog signal converted by the converting circuits 7a, 7b is fed to an analog multiplexer 8, which is switched by the clock signal phi and synthesized, then the result is extracted at an output terminal 10 via a low pass filter 9.

    PULSE GENERATING CIRCUIT
    104.
    发明专利

    公开(公告)号:JPS60186184A

    公开(公告)日:1985-09-21

    申请号:JP4233184

    申请日:1984-03-05

    Applicant: SONY CORP

    Abstract: PURPOSE:To generate a pulse which includes a specific horizontal scanning period of a video signal by applying a fixed input signal to the 1st and the 2nd shift registers and ORing outputs pulses of two shift register exclusively. CONSTITUTION:A pulse VBLK' obtained by inverting a pulse VBLK from a terminal 43 through an inverter 46 is applied to the clear terminal CL of a shift register 41 and a pulse HBLK is applied from a terminal 45 to the clock terminal CK as a clock pulse; and a specific high level input is applied to the terminal IN from a terminal 44. The output QA of a register 41 is applied to the clear terminal CL of the shift register 41, a pulse HBLK' obtained by inverting a pulse HBLK through an inverter 47 is applied to the clock terminal CK, and a specific high level input is applied to the input IN. Consequently, pulses PW and PB, and PW1 and PB1 appear at outputs of exclusive OR circuits 48-51.

    TELEVISION RECEIVER
    108.
    发明专利

    公开(公告)号:JPS5720072A

    公开(公告)日:1982-02-02

    申请号:JP9420380

    申请日:1980-07-10

    Applicant: SONY CORP

    Abstract: PURPOSE:To make accurate adjustment with simple constitution by extracting at least an audio IF signal and an AFT signal from the output of a phase comparator. CONSTITUTION:The output signal of a limiter 8 is supplied to a pi/2 phase shifter 17 to generate a signal pi/2 out of phase with a video carrier, and the signal from the limiter 8 and that from this phase shifter 17 are supplied to a multiplier 19. At the output terminal 11 of the multiplier 19, a signal having a suppressed video signal component appears, and this signal is supplied to a 4.5 MC tuning circuit which is not shown in the figure to extract an audio intermediate frequency SIF signal. The signal appearing at the output terminal 11 is supplied to an LPF13 and an AFT signal is supplied to a local oscillator 4. Consequently, a BPF, a limiter, etc., are used in common to simplify circuit constitution, and adjustment points are less, so the adjustment is easy, thereby making the accurate adjustment.

    Television picture receiver
    109.
    发明专利
    Television picture receiver 失效
    电视图片接收器

    公开(公告)号:JPS54150026A

    公开(公告)日:1979-11-24

    申请号:JP5917878

    申请日:1978-05-18

    Applicant: Sony Corp

    Abstract: PURPOSE: To secure application of the synchronism in a short time and furthermore to improve the video detection property by forming the selector circuit into such constitution that the high region component can be made to pass at the time of step-out and the passing of the high region component is blocked at the time of synchronism application.
    CONSTITUTION: The output of video detector 4 of the picture receiver is supplied to step-out detector 50 to detect the step-out, and thus the detection signal is supplied to LPF20 (a selector circuit) via the switch circuit of the time constant to form PLL loop 16. At the same time, the voltage based on the signal component (right side of waveform A
    1 ) featuring a wide band centering on video intermediate carrier frequency f
    p is supplied to oscillator 5 to increase the capture range. Thus, the synchronism can be applied in a short time. When the synchronism is applied, loop 16 is formed. But the voltage based on the signal component (right side of waveform B
    1 ) of the narrow band centerin on f
    p is supplied to oscillator 5. As a result, the purity is improved for the reference carrier to eliminate occurrence of the crosscolor, the beat between the video,carrier wave and chrominance subcarrier and others, thus improving the video detection property.
    COPYRIGHT: (C)1979,JPO&Japio

    Abstract translation: 目的:为了在短时间内确保同步的应用,并且通过将选择器电路形成为可以使高区域分量在退出时通过,并且通过 在同步应用时,高区域组件被阻塞。 构成:图像接收机的视频检测器4的输出被提供给步出检测器50以检测出退出,因此检测信号经由时间常数的开关电路提供给LPF20(选择器电路) 形成PLL环路16.同时,将以视频中间载波频率fp为中心的宽频带的信号分量(波形A1的右侧)的电压提供给振荡器5以增加捕获范围。 因此,可以在短时间内应用同步。 当施加同步时,形成环16。 但是基于fp上的窄带中心的信号分量(波形B1的右侧)的电压被提供给振荡器5.结果,为了消除参考载波的纯度,消除了交叉色的发生, 视频,载波和色度副载波等,从而提高视频检测属性。

    OSCILLATOR
    110.
    发明专利

    公开(公告)号:JPS53111265A

    公开(公告)日:1978-09-28

    申请号:JP2634277

    申请日:1977-03-10

    Applicant: SONY CORP

    Abstract: PURPOSE:To make excellent IC-implementation possible by enabling a simplyconstituted oscillator to output oscillation signals which are 90 deg. out of phase each other and by making possible to extract every signal through push-pull.

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