公开(公告)号：JPH07170529A

公开(公告)日：1995-07-04

申请号：JP28258194

申请日：1994-10-21

Applicant: SONY CORP

Inventor： ITABASHI TAKAO ,  YAMADA HISAFUMI ,  MOTOMIYA MASAYUKI ,  ISHIGAKI YOSHIO

IPC: H04N9/73

Abstract: PURPOSE:To prevent or reduce a fault such as disturbance of a synchronizing signal by allowing the automatic white balance adjustment circuit to detect or predict the disturbance of the synchronizing signal on the occurrence of it so as to suppress or stop white balancing. CONSTITUTION:Changeover of an input signal and a channel is implemented by the key operation of a key panel 24 through an interface 29 by a channel selection microcomputer 19. In this case, data DATA1 are fed to a control microcomputer 20 and data DATA2 representing missing of a synchronizing signal are fed to the control microcomputer 20 via an interface 28 and a bus 22 from a pulse processing circuit 15H. The microcomputer 20 controls the automatic white balance adjustment circuit so that automatic white balancing is not adjusted at the changeover of an input signal or channel in which presence of disturbance in a synchronizing signal such as missing of synchronizing signal is detected or predicted. Thus, a timing for current measurement is deviated to prevent the fault.

公开(公告)号：JPH0229170A

公开(公告)日：1990-01-31

申请号：JP17961888

申请日：1988-07-19

Applicant: SONY CORP

Inventor： MOTOE HISASHI ,  MOTOMIYA MASAYUKI ,  KAWASHIMA HIROYUKI ,  TOKUHARA MASAHARU

IPC: H04N5/14

Abstract: PURPOSE:To minimize a circuit scale and to execute satisfactory Y/C separation and high picture quality processing all the time by providing an analog Y/C separating circuit, supplying a clock phase-locked with a horizontal synchronizing signal, and executing processing such as scanning line interpolation. CONSTITUTION:A luminance signal Y outputted from a Y/C separating circuit 2 is converted into a digital signal in an A/D converter 3Y and after that supplied to a signal processing circuit 5Y, a chrominance signal C is color- demodulated in a chroma decoder 4, converted into the digital signal in an A/D converter 3C, and after that supplied to a signal processing circuit 5C, signal processing such as the scanning line interpolation is executed, and both the luminance signal Y and the chrominance signal C are respectively made into analog signals in D/A converters 6Y, 6R and 6B. Further, a clock CLKH phase-locked with a horizontal synchronizing signal HD is outputted from a generating circuit 7, and this clock CLKH is supplied to a digital processing system composed from the A/D converters 3Y and 3C to the D/A converters 6Y, 6R and 6B. Thus, the circuit scale can be minimized, and the satisfactory Y/C separation and the processing for obtaining high picture quality can be executed all the time.

公开(公告)号：JPH01157104A

公开(公告)日：1989-06-20

申请号：JP27240188

申请日：1988-10-28

Applicant: SONY CORP

Inventor： MURAKAMI KYOICHI ,  FUKUSHIMA NORIYUKI ,  MOTOMIYA MASAYUKI

IPC: H03B5/32

Abstract: PURPOSE:To obtain a stable VCO with an oscillation frequency of wide range by connecting a quartz oscillator between the inversion input terminal of an operational amplifier and the ground and a capacitor for compensating oscillation between the non-inversion input terminal and the ground, and making the operational amplifier, a feedback resistor, and the capacitor for compensating oscillation into an IC. CONSTITUTION:The output of the operational amplifier 1 is fed back to the inversion and non-inversion input terminals via a variable phase shift circuit 2 and the feedback resistors R2 and R1. And in the amplifier, the quartz oscillator X1 is connected between the inversion input terminal and the ground and the capacitor C1 for compensating oscillation between the non-inversion input terminal and the ground, and the whole of them except for the oscillator are made into the IC. At this time, it is enough to prepare only an external terminal T1 as the external terminal to connect the oscillator X1, which facilitates the making of components into the IC. By connecting the components in such a way, it becomes equivalent to the connection of a capacitor with a capacity of -C1 to the inversion input terminal, and it functions so as to offset a floating capacitance Cx. As a result, since the phase can be varied extending over a wide range, the oscillation frequency can be changed smoothly.

公开(公告)号：JPS62105584A

公开(公告)日：1987-05-16

申请号：JP24582585

申请日：1985-11-01

Applicant: SONY CORP

Inventor： SARUGAKU TOSHIO ,  MOTOE HISAFUMI ,  TOKUHARA MASAHARU ,  MOTOMIYA MASAYUKI

IPC: H04N5/265 ,  H04N5/45

Abstract: PURPOSE:To facilitate the change and the selection of the type of a memory by constituting the picture memory by the plural memories equal in the number of secondary screens and adding a secondary screen selecting signal to a writing address signal and a reading address signal. CONSTITUTION:A signal for a main screen obtained from a changeover circuit 5 is applied to a Y/C processing and synchronization processing circuit 6 and the signal for the secondary screen is applied to a Y/C processing and synchronization processing circuit 7. The secondary screen signal obtained from the circuit 7 synchronizes with a synchronizing signal of the secondary screen signal, written in the memory 10 and the secondary screen signal is read synchronously with the synchronizing signal of the main screen signal from the memory 10. The memory 10 is constituted of for instance, four memories 10B-10E which are equal in the number of the secondary screens, and to the memories 10B-10E, common horizontal addresses 0-31, and vertical addresses 0-63 are applied. Screen selecting switches 21A-21E are provided, in accordance with a selecting operation, the screen selecting signal is applied to a control circuit 19 and a memory control circuit 13 from a screen selecting circuit 22. Thereby the screen can easily be selected.

公开(公告)号：JPS61246808A

公开(公告)日：1986-11-04

申请号：JP8776085

申请日：1985-04-24

Applicant: SONY CORP

Inventor： ITABASHI TAKAO ,  YAMADA HISAFUMI ,  SAITO JUNYA ,  MOTOMIYA MASAYUKI

IPC: H04Q9/00 ,  G05B24/00 ,  G05B24/02 ,  H04N5/44

Abstract: PURPOSE:To attain ease of adjusting operation by adopting the constitution that a user control quantity is set automatically to a reference value corresponding to the adjustment item at the adjusting mode. CONSTITUTION:A reference setting data for each circuit and a user control data are written in a RAM of a control microcomputer 20. Then each circuit is set by the offset value between the reference setting data and the central value of the user control data. At application of power, whether the adjustment mode or the user mode is discriminated. For example, when a commander 26 is connected to a terminal 25 of the microcomputer 20, it is discriminated as the adjustment mode and in other case, it is discriminated as the user mode. When it is discriminated as the adjustment mode, each mean reference setting data of each circuit written in advance in the ROM of the microcomputer 20, for example, is read and written in the RAM of the microcomputer 20 an the user control data is set automatically to the reference value.

公开(公告)号：JPS6041377A

公开(公告)日：1985-03-05

申请号：JP14166784

申请日：1984-07-09

Applicant: SONY CORP

Inventor： MOTOMIYA MASAYUKI ,  ISHIGAKI YOSHIO ,  OKADA HISAO

IPC: H04N5/91 ,  G11B31/00 ,  H04N5/44 ,  H04N5/455

Abstract: PURPOSE:To improve operability by controlling a channel selecting voltage generating circuit with n-number of outputs from an (n+1)-notation counter and controlling a changeover switch with another output. CONSTITUTION:In case of reception of a TV signal, one of changeover switches 11-22 is selected to obtain an output only in the prescribed output terminal of a counter 43 related to the selected changeover switch. Consequently, a channel selecting voltage is generated only from a variable resistance, which is connected to said prescribed output terminal, out of n-number of variable resistances 24-35 connected to the output side of the counter 43, and this channel selecting voltage is sent to an electronic tuning tuner 37. The existence of the (n+1)th input is stored in the counter 43 by the operation of a changeover switch 23 to output ''1'' alternatively, and a changeover switch 38 is switched by this output to reproduce the video output of a VTR1 onto a CRT9 as a picture. Pulses having a prescribed period are supplied to the counter 43 by the operation of a remote control device 44, and output ''1'' is supplied to succeeding channels successively.

公开(公告)号：JPS5720072A

公开(公告)日：1982-02-02

申请号：JP9420380

申请日：1980-07-10

Applicant: SONY CORP

Inventor： MOTOMIYA MASAYUKI ,  OOMURO SHIGERU ,  KITA HIROYUKI ,  TOKUHARA MASAHARU

IPC: H04N5/50 ,  H04N5/62

Abstract: PURPOSE:To make accurate adjustment with simple constitution by extracting at least an audio IF signal and an AFT signal from the output of a phase comparator. CONSTITUTION:The output signal of a limiter 8 is supplied to a pi/2 phase shifter 17 to generate a signal pi/2 out of phase with a video carrier, and the signal from the limiter 8 and that from this phase shifter 17 are supplied to a multiplier 19. At the output terminal 11 of the multiplier 19, a signal having a suppressed video signal component appears, and this signal is supplied to a 4.5 MC tuning circuit which is not shown in the figure to extract an audio intermediate frequency SIF signal. The signal appearing at the output terminal 11 is supplied to an LPF13 and an AFT signal is supplied to a local oscillator 4. Consequently, a BPF, a limiter, etc., are used in common to simplify circuit constitution, and adjustment points are less, so the adjustment is easy, thereby making the accurate adjustment.

公开(公告)号：JPS54150026A

公开(公告)日：1979-11-24

申请号：JP5917878

申请日：1978-05-18

Applicant: Sony Corp

Inventor： MOTOMIYA MASAYUKI ,  TOKUHARA MASAHARU

IPC: H04N5/455 ,  H04N5/50

Abstract: PURPOSE: To secure application of the synchronism in a short time and furthermore to improve the video detection property by forming the selector circuit into such constitution that the high region component can be made to pass at the time of step-out and the passing of the high region component is blocked at the time of synchronism application.
CONSTITUTION: The output of video detector 4 of the picture receiver is supplied to step-out detector 50 to detect the step-out, and thus the detection signal is supplied to LPF20 (a selector circuit) via the switch circuit of the time constant to form PLL loop 16. At the same time, the voltage based on the signal component (right side of waveform A
1 ) featuring a wide band centering on video intermediate carrier frequency f
p is supplied to oscillator 5 to increase the capture range. Thus, the synchronism can be applied in a short time. When the synchronism is applied, loop 16 is formed. But the voltage based on the signal component (right side of waveform B
1 ) of the narrow band centerin on f
p is supplied to oscillator 5. As a result, the purity is improved for the reference carrier to eliminate occurrence of the crosscolor, the beat between the video,carrier wave and chrominance subcarrier and others, thus improving the video detection property.
COPYRIGHT: (C)1979,JPO&Japio

Abstract translation: 目的：为了在短时间内确保同步的应用，并且通过将选择器电路形成为可以使高区域分量在退出时通过，并且通过 在同步应用时，高区域组件被阻塞。 构成：图像接收机的视频检测器4的输出被提供给步出检测器50以检测出退出，因此检测信号经由时间常数的开关电路提供给LPF20（选择器电路） 形成PLL环路16.同时，将以视频中间载波频率fp为中心的宽频带的信号分量（波形A1的右侧）的电压提供给振荡器5以增加捕获范围。 因此，可以在短时间内应用同步。 当施加同步时，形成环16。 但是基于fp上的窄带中心的信号分量（波形B1的右侧）的电压被提供给振荡器5.结果，为了消除参考载波的纯度，消除了交叉色的发生， 视频，载波和色度副载波等，从而提高视频检测属性。

公开(公告)号：JPS53111265A

公开(公告)日：1978-09-28

申请号：JP2634277

申请日：1977-03-10

Applicant: SONY CORP

Inventor： MOTOMIYA MASAYUKI ,  IRIE OSAMU ,  TOKUHARA MASAHARU

IPC: H03B27/00 ,  H03B5/12

Abstract: PURPOSE:To make excellent IC-implementation possible by enabling a simplyconstituted oscillator to output oscillation signals which are 90 deg. out of phase each other and by making possible to extract every signal through push-pull.

公开(公告)号：JPS5399748A

公开(公告)日：1978-08-31

申请号：JP1398877

申请日：1977-02-10

Applicant: SONY CORP

Inventor： MOTOMIYA MASAYUKI

IPC: H03H9/30 ,  H03H9/38 ,  H04N5/95

Abstract: PURPOSE:To take out video signals without changing the frequency, namely, without distortion by changing simultaneously speed V and wave length lambda of ultrasonic wave signals which are propagated through a magnetic distortion delay body.