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    CURRENT LIMITER FOR FIELD EMISSION STRUCTURE
    111.
    发明申请
    CURRENT LIMITER FOR FIELD EMISSION STRUCTURE 审中-公开
    现场排放结构的当前限制

    公开(公告)号：WO9904407A3

    公开(公告)日：1999-04-08

    申请号：PCT/US9813695

    申请日：1998-07-01

    Applicant: FED CORP ,  LIU YACHIN ,  ZIMMERMAN STEVEN

    Inventor： LIU YACHIN ,  ZIMMERMAN STEVEN

    IPC: H01J1/304 ,  H01J1/02 ,  H01J1/16

    CPC classification number: H01J1/3042 ,  H01J2201/319

    Abstract: A current limiter for flat panel field emission display devices is disclosed. The current limiter includes a vertical resistor (22) and a lateral resistor (21) which in combination provide uniform emission and blow-out protection. The current limiter consists of two layers (21, 22) of different resistive materials. The resistivity for the top layer is determined by the emission current density requirement and the geometric configuration of the device, including emitter base and pitch dimensions, emitter density per array and the resistive film thickness. This top layer resistor conducts vertically and helps prevent emitters with slightly lower emission thresholds from delaying the turn-on of other emitters within a pixel. Intra-pixel individual emitter resistance is substantially controlled by the vertical resistive layer (22), while the blow-out resistance and inter-pixel uniformity is controlled primarily by the lateral resistive layer (21).

    Abstract translation: 公开了一种用于平板场致发射显示装置的电流限制器。 电流限制器包括垂直电阻器（22）和横向电阻器（21），其组合提供均匀的发射和吹出保护。 电流限制器由不同电阻材料的两层（21,22）组成。 顶层的电阻率由发射电流密度要求和器件的几何配置决定，包括发射极基极和间距尺寸，每阵列的发射极密度和电阻膜厚度。 该顶层电阻器垂直传导，并有助于防止具有稍低的发射阈值的发射器延迟像素内的其它发射器的导通。 像素内的单个发射极电阻基本上由垂直电阻层（22）控制，而吹出电阻和像素间均匀性主要由横向电阻层（21）控制。

    MULTI-LAYER RESISTOR FOR AN EMITTING DEVICE
    112.
    发明申请
    MULTI-LAYER RESISTOR FOR AN EMITTING DEVICE 审中-公开
    用于发射器件的多层电阻器

    公开(公告)号：WO99000817A1

    公开(公告)日：1999-01-07

    申请号：PCT/US1998/012461

    申请日：1998-06-19

    IPC: H01J9/02 ,  H01J1/304 ,  H01J3/02 ,  H01J29/04 ,  H01J31/12 ,  H01J1/62

    CPC classification number: H01J3/022 ,  H01J2201/319 ,  H01J2329/00

    Abstract: An electron-emitting device employs a multi-layer resistor (46). A lower layer (48) of the resistor overlies an emitter electrode (42). An electron-emissive element (54) overlies an upper layer (50) of the resistor. The two resistive layers are of different chemical composition. The upper resistive layer is typically formed with cermet. The lower resistive layer is typically formed with a silicon-carbon compound. In fabricating the device, the upper resistive layer normally serves as an etch stop for protecting the lower resistive layer and the emitter electrode during the etch of an overlying dielectric layer (52) to form an opening (56) in which the electron-emissive element is later provided.

    Abstract translation: 电子发射器件采用多层电阻（46）。 电阻器的下层（48）覆盖发射电极（42）。 电子发射元件（54）覆盖电阻器的上层（50）。 两个电阻层的化学成分不同。 上电阻层通常由金属陶瓷形成。 下电阻层通常由硅 - 碳化合物形成。 在制造该器件时，上电阻层通常用作蚀刻停止件，用于在上覆电介质层（52）的蚀刻期间保护下电阻层和发射极，以形成开口（56），其中电子发射元件 后来提供。

    FIELD EMITTER DEVICE, AND VEIL PROCESS FOR THE FABRICATION THEREOF
    113.
    发明申请
    FIELD EMITTER DEVICE, AND VEIL PROCESS FOR THE FABRICATION THEREOF 审中-公开
    场发射器件及其制造方法

    公开(公告)号：WO9709731A3

    公开(公告)日：1997-04-03

    申请号：PCT/US9613330

    申请日：1996-08-19

    Applicant: FED CORP

    Inventor： JONES GARY W ,  ZIMMERMAN STEVEN M ,  SILVERNAIL JEFFREY A ,  JONES SUSAN K SCHWARTZ

    IPC: H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J

    CPC classification number: H01J9/025 ,  H01J3/022 ,  H01J2201/319 ,  H01J2329/00 ,  Y10S428/938

    Abstract: A field emitter device formed by a veil process wherein a protective layer including a release layer is deposited on a gate electrode layer (62) for the device, the protective layer overlaying the circumscribing peripheral edge of the opening of the gate electrode layer (62) to protect the edge of the gate electrode layer (62) during etching of a field emitter cavity (72) in a dielectric material layer (30) on a substrate (12) and during the formation of a field emitter element (40) in the cavity by depositing a field emitter material through the opening (72). The protective layer is readily removed subsequent to completion of the cavity etching formation steps, to yield the field emitter device. The field emission device further includes a current limiter composition (14) for permitting high frequency emission of electrons from the field emitter element (40) at low turn-on voltage.

    FIELD ELECTRON EMISSION MATERIALS AND DEVICES
    114.
    发明申请
    FIELD ELECTRON EMISSION MATERIALS AND DEVICES 审中-公开
    现场电子发射材料和器件

    公开(公告)号：WO1997006549A1

    公开(公告)日：1997-02-20

    申请号：PCT/GB1996001858

    申请日：1996-08-02

    Applicant: TUCK, Richard, Allan ,  LATHAM, Rodney, Vaughan ,  TAYLOR, William

    IPC: H01J01/30

    CPC classification number: H01J1/304 ,  H01J1/3042 ,  H01J2201/319

    Abstract: A field electron emission material comprises an electrically conductive substrate (13, 14) and, disposed thereon, electrically conductive particles (11) embedded in, formed in, or coated by a layer of inorganic electrically insulating material (12) (e.g. glass). A first thickness (15) of the insulating material is defined between each particle (11) and the substrate (13, 14) and a second thickness (15) of the insulating material is defined between the particle (11) and the environment in which the material is disposed. The dimension of each particle (11) between the first and second thicknesses (15) is significantly greater than each thickness (15). Upon application of a sufficient electric field, each thickness (15) provides a conducting channel, to afford electron emission from the particles (11). By use of an inorganic insulating material (12), surprisingly good stability and performance have been obtained. The particles (11) can be relatively small, such that the electron emitting material (11, 12) can be applied to the substrate (13, 14) quite cheaply by a variety of methods, including printing. The material can be used in a variety of devices, including display and illuminating devices.

    Abstract translation: 场致电子发射材料包括导电衬底（13,14），并且在其上设置嵌入在一层无机电绝缘材料（12）（例如玻璃）中形成或涂覆的导电颗粒（11）。 绝缘材料的第一厚度（15）被限定在每个颗粒（11）和基底（13,14）之间，绝缘材料的第二厚度（15）被限定在颗粒（11）和环境 材料被布置。 第一和第二厚度（15）之间的每个颗粒（11）的尺寸明显大于每个厚度（15）。 在施加足够的电场时，每个厚度（15）提供导电通道，以从颗粒（11）提供电子发射。 通过使用无机绝缘材料（12），已经获得令人惊讶的良好的稳定性和性能。 颗粒（11）可以相对较小，使得电子发射材料（11,12）可以通过包括印刷的各种方法相当便宜地施加到基板（13,14）。 该材料可用于各种设备，包括显示和照明设备。

    FIELD EMITTER STRUCTURES
    115.
    发明申请
    FIELD EMITTER STRUCTURES 审中-公开
    现场发射机结构

    公开(公告)号：WO1996006443A1

    公开(公告)日：1996-02-29

    申请号：PCT/GB1995001943

    申请日：1995-08-16

    Applicant: ISIS INNOVATION LIMITED ,  WILSHAW, Peter, Richard

    Inventor： ISIS INNOVATION LIMITED

    IPC: H01J03/02

    CPC classification number: H01J1/3042 ,  H01J9/025 ,  H01J2201/319

    Abstract: A field emitter device comprises a dielectric anodic aluminium oxide layer having pores filled with wires the front ends of which constitute individual field emitting cathodes, a gate electrode overlying a front surface of the layer, and an address electrode overlying a back surface of the layer and in electrical contact with the wires. The problem of short circuit between the gate electrode and the field emitter is overcome by cleaning the pore walls adjacent the gate electrode and/or by selectively dissolving the back ends of individual wires.

    Abstract translation: 场致发射器件包括介电阳极氧化铝层，其具有填充有导线的孔，其前端构成单个场发射阴极，覆盖该层的前表面的栅电极和覆盖该层后表面的寻址电极， 与电线电接触。 通过清洁邻近栅电极的孔壁和/或通过选择性地溶解单根线的后端来克服栅电极和场发射极之间的短路问题。

    METHOD FOR PRODUCING MICRODOT EMITTING CATHODES ON SILICON FOR COMPACT FLAT SCREENS, AND RESULTING PRODUCTS
    117.
    发明申请
    METHOD FOR PRODUCING MICRODOT EMITTING CATHODES ON SILICON FOR COMPACT FLAT SCREENS, AND RESULTING PRODUCTS 审中-公开
    用于生产用于紧凑型平面屏幕的硅的微孔发射阴极的方法和结果产品

    公开(公告)号：WO1994014182A1

    公开(公告)日：1994-06-23

    申请号：PCT/FR1993001191

    申请日：1993-12-03

    Applicant: PIXEL INTERNATIONAL S.A. ,  GARCIA, Michel

    Inventor： PIXEL INTERNATIONAL S.A.

    IPC: H01J17/49

    CPC classification number: H01J9/025 ,  H01J2201/319

    Abstract: A method for producing microdot emitting cathodes on silicon for compact flat screens, and the products obtained by means of said method, are disclosed. According to the method, the emitting cathodes are made from a basic monolithic silicon substrate (1) consisting of a thick wafer (at least 300 microns) or a thin film a few microns thick on an insulating substrate (alumina or glass), the silicon film being "active" in both cases. The method is useful in the field of flat display screens based on the physical phenomenon of cathodoluminescence and field effect electron emission, and in all industrial sectors using compact display screens, e.g. video camera viewfinders, calculators, monitoring devices of all kinds, vehicles, watches and clocks, etc.

    Abstract translation: 公开了一种用于制造用于紧凑型平面屏幕的硅上的微点发射阴极的方法，以及通过所述方法获得的产品。 根据该方法，发光阴极由绝缘衬底（氧化铝或玻璃）上的厚晶片（至少300微米）或几微米厚的薄膜构成的基本单片硅衬底（1）制成，硅 在这两种情况下，电影都是“活跃的”。 该方法在基于阴极发光和场效应电子发射的物理现象的平面显示屏领域以及使用紧凑型显示屏幕的所有工业领域中是有用的。 摄像机取景器，计算器，各种监控装置，车辆，钟表等。

    PROCEDE DE FABRICATION D'UNE CATHODE EMISSIVE
    119.
    发明公开
    PROCEDE DE FABRICATION D'UNE CATHODE EMISSIVE 审中-公开
    一种用于生产阴极发射

    公开(公告)号：EP1885649A2

    公开(公告)日：2008-02-13

    申请号：EP06820247.2

    申请日：2006-05-29

    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE

    Inventor： MEYER, Robert ,  MONTMAYEUL, Brigitte

    IPC: B82B3/00 ,  B82B1/00 ,  H01J9/02 ,  H01J1/304

    CPC classification number: H01J9/025 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/162 ,  D01F9/127 ,  H01J1/3048 ,  H01J31/127 ,  H01J2201/30469 ,  H01J2201/319 ,  H01L51/0048 ,  H01L51/0541 ,  H01L51/055

    Abstract: The invention concerns a method for producing a triode-type cathode structure including steps for depositing and steps for etching a cathode layer to transform it to cathode conductors; a grid layer to transform it into grid conductors; an electrically insulating layer and the grid conductors until a resistive layer is achieved to provide cavities; cathode conductors to provide them with an open-work structure at the intersection of the cathode conductors and the grid conductors. The invention is characterized in that the steps for etching the grid conductors and the electrically insulating layer consist in: a) depositing a resin layer on the grid layer; b) patterning the resin layer by means of lithography to obtain emissive pads; c) etching the structured grid layer into grid conductors, based on the pattern; d) etching the insulating layer underlying the grid layer by enlarging the etching beyond the emissive pads; e) etching the grid layer at the zones exposed by etching the insulating layer until the resin layer is reached; f) depositing a catalyst layer into the openings of the resin layer so as to form the emissive pads at the base of the cavity; g) removing the resin layer.

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