公开(公告)号：KR100684374B1

公开(公告)日：2007-02-20

申请号：KR1020050048477

申请日：2005-06-07

Applicant: 르네사스 일렉트로닉스 가부시키가이샤

Inventor： 나카자와다이보

IPC: H01L23/12

CPC classification number: H05K1/111 ,  H01L2924/0002 ,  H05K3/321 ,  H05K2201/09745 ,  H05K2201/10484 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

Abstract: 개시된 내용은 도전성 접착제의 양을 늘리고 칩부품과 도전성 접착제의 접촉면적을 크게 해도, 인접하는 패드부나 부품과의 단락을 막을 수 있는 칩부품실장체 및 반도체장치를 제공하는 것이다. 본 발명은 인쇄배선판(1)상에 도전성 접착제(3)를 통해서 칩부품(2)이 실장된 칩부품실장체에 있어서, 칩부품은, 각부(2b)를 가지는 동시에 그 각부의 능선이 인쇄배선판의 패드부(1a)측을 향해서 배치되고, 또한 칩부품의 각부의 능선에 인접하는 면과 패드부의 표면이 이루는 각도(α)가 예각이 되도록 탑재되는 것을 특징으로 한다.
칩, 실장체, 반도체, 도전성 접착제, 단락

公开(公告)号：KR1020060049175A

公开(公告)日：2006-05-18

申请号：KR1020050048477

申请日：2005-06-07

Applicant: 르네사스 일렉트로닉스 가부시키가이샤

Inventor： 나카자와다이보

IPC: H01L23/12

CPC classification number: H05K1/111 ,  H01L2924/0002 ,  H05K3/321 ,  H05K2201/09745 ,  H05K2201/10484 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

Abstract: 개시된 내용은 도전성 접착제의 양을 늘리고 칩부품과 도전성 접착제의 접촉면적을 크게 해도, 인접하는 패드부나 부품과의 단락을 막을 수 있는 칩부품실장체 및 반도체장치를 제공하는 것이다. 본 발명은 인쇄배선판(1)상에 도전성 접착제(3)를 통해서 칩부품(2)이 실장된 칩부품실장체에 있어서, 칩부품은, 각부(2b)를 가지는 동시에 그 각부의 능선이 인쇄배선판의 패드부(1a)측을 향해서 배치되고, 또한 칩부품의 각부의 능선에 인접하는 면과 패드부의 표면이 이루는 각도(α)가 예각이 되도록 탑재되는 것을 특징으로 한다.
칩, 실장체, 반도체, 도전성 접착제, 단락

公开(公告)号：KR1020050036756A

公开(公告)日：2005-04-20

申请号：KR1020040081744

申请日：2004-10-13

Applicant: 파텐트-트로이한트-게젤샤프트 퓌어 엘렉트리쉐 글뤼람펜 엠베하

Inventor： 레헬러,라인하르트 ,  샬모저,오스카르

IPC: H05K7/20

CPC classification number: H05B41/02 ,  H05K3/301 ,  H05K2201/066 ,  H05K2201/10166 ,  H05K2201/10484

Abstract: 본 발명은 냉각될 컴포넌트(4), 및 회로 기판(1)과 10°-70°의 각도를 이루는 방열기(6,6')를 가진 램프 동작용 회로에 관한 것이다.

公开(公告)号：US20170019996A1

公开(公告)日：2017-01-19

申请号：US15124499

申请日：2015-02-27

Applicant: SONY CORPORATION

Inventor： Toshihiko WATANABE

IPC: H05K1/11 ,  H05K3/34 ,  H05K3/40 ,  H05K3/00 ,  H05K3/42

CPC classification number: H05K1/116 ,  H01L21/486 ,  H01L23/49827 ,  H01L33/48 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2924/1531 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/0306 ,  H05K1/112 ,  H05K1/115 ,  H05K3/0094 ,  H05K3/3436 ,  H05K3/3447 ,  H05K3/3489 ,  H05K3/4007 ,  H05K3/42 ,  H05K2201/09154 ,  H05K2201/0959 ,  H05K2201/09863 ,  H05K2201/10106 ,  H05K2201/10484 ,  H05K2203/1383 ,  H05K2203/1394 ,  Y02P70/613

Abstract: A mounting substrate includes a through-hole 13 formed in a substrate 10, a first land part 21, a second land part 31, a first component attaching part 22, a second component attaching part 32, a conductive layer 14, and a filling member 15 filled into a part of the through-hole 13. A shortest distance allowable value L0 from the center of the first land part 21 to a component 51 is determined on the basis of the volume Vh of a part of the through-hole 15 positioned above a top surface of the filling member 15 on the side of the first land part 21, the length L1 of the component 51 to be mounted to the first component attaching part 22, and the maximum allowable value of the inclination of the component 51 to be mounted to the first component attaching part 22 relative to the first surface 11 of the substrate 10.

Abstract translation: 安装基板包括形成在基板10中的通孔13，第一接地部21，第二接地部31，第一部件安装部22，第二部件安装部32，导电层14和填充部件 15被填充到通孔13的一部分中。从第一陆部21的中心到部件51的最短距离允许值L0基于定位的通孔15的一部分的体积Vh来确定 在第一接地部21侧的填充部件15的上表面上，要安装到第一部件安装部22的部件51的长度L1和部件51的倾斜度的最大允许值为 相对于基板10的第一表面11安装到第一部件安装部22。

公开(公告)号：US20170015435A1

公开(公告)日：2017-01-19

申请号：US15209895

申请日：2016-07-14

Applicant: Goodrich Lighting Systems GmbH

Inventor： Anil Kumar Jha ,  Norbert Menne ,  Elmar Schrewe ,  Robert Trinschek ,  Andre Hessling-von Heimendahl

IPC: B64D47/02 ,  F21V23/04 ,  H05K1/18

CPC classification number: B64D47/02 ,  F21V23/04 ,  H05K1/053 ,  H05K1/056 ,  H05K1/181 ,  H05K3/3431 ,  H05K2201/10106 ,  H05K2201/10484 ,  Y02P70/611

Abstract: An aircraft LED light unit comprises at least one printed circuit board which comprises at least one metal core layer and at least one dielectric layer, and at least one LED disposed on the printed circuit board and which comprises an anode and a cathode for electrically coupling to a power source. One of the anode and cathode of the at least one LED is connected to an electrical conductor which is disposed on the dielectric layer and is coupled to a first terminal of the power source, wherein the dielectric layer electrically isolates the electrical conductor from the metal core layer, and the other one of the anode and cathode of the at least one LED is connected to the metal core layer of the at least one printed circuit board, wherein the metal core layer is coupled to a second terminal of the power source.

Abstract translation: 飞机LED灯单元包括至少一个包括至少一个金属芯层和至少一个介电层的印刷电路板，以及布置在印刷电路板上的至少一个LED，并且包括用于电耦合到 电源。 至少一个LED的阳极和阴极之一连接到电导体，电导体设置在电介质层上并且耦合到电源的第一端子，其中电介质层将电导体与金属芯电隔离 层，并且所述至少一个LED的阳极和阴极中的另一个连接到所述至少一个印刷电路板的金属芯层，其中所述金属芯层耦合到所述电源的第二端子。

公开(公告)号：US20160282291A1

公开(公告)日：2016-09-29

申请号：US15074499

申请日：2016-03-18

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yuu YAMAYOSE ,  Tetsuya KUGIMIYA

IPC: G01N27/20 ,  G01N27/04 ,  G01N25/72

CPC classification number: G01N27/20 ,  G01N27/045 ,  H05K1/0268 ,  H05K3/30 ,  H05K3/34 ,  H05K2201/10151 ,  H05K2201/10484

Abstract: According to one embodiment, an electronic device comprises a circuit board, an electrical component, and a measurement unit. The circuit board has a first face. The electrical component includes a second face electrically connected to the first face via a bonding material, a first end in a first direction along the second face, and a second end. The second end is opposite to the first end in the first direction. The measurement unit is configured to measure a characteristic changing depending on a conductivity of the bonding material. A first distance between the first face and the first end is shorter than a second distance between the first face and the second end. The measurement unit includes a first measurement unit configured to measure the characteristic of a part of the bonding material. The part is adjacent to the first end.

Abstract translation: 根据一个实施例，电子设备包括电路板，电气部件和测量单元。 电路板有第一面。 电气部件包括通过接合材料电连接到第一面的第二面，沿着第二面的沿第一方向的第一端和第二端。 第二端与第一方向的第一端相反。 测量单元被配置为测量根据接合材料的导电性而变化的特性。 第一面和第一端之间的第一距离比第一面和第二端之间的第二距离短。 测量单元包括被配置为测量接合材料的一部分的特性的第一测量单元。 该部分与第一端相邻。

公开(公告)号：US09297971B2

公开(公告)日：2016-03-29

申请号：US14047978

申请日：2013-10-07

Applicant: Oracle International Corporation

Inventor： Hiren D. Thacker ,  Ashok V. Krishnamoorthy ,  Robert David Hopkins, II ,  Jon Lexau ,  Xuezhe Zheng ,  Ronald Ho ,  Ivan Shubin ,  John E. Cunningham

IPC: G02B6/42 ,  H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H05K3/36

CPC classification number: G02B6/4274 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/72 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/32225 ,  H01L2224/72 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06534 ,  H01L2225/06589 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/37001 ,  H05K3/36 ,  H05K2201/10484 ,  H01L2924/00

Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and this top surface is in turn electrically coupled to a front surface of an input/output (I/O) integrated circuit that faces the top surface. Furthermore, the front surface of the I/O integrated circuit is electrically coupled to a top surface of the optical integrated circuit, where the top surface of the optical integrated circuit faces the front surface of the I/O integrated circuit.

Abstract translation: 芯片封装包括在芯片封装中彼此靠近的光学集成电路（例如混合集成电路）和集成电路。 集成电路包括诸如存储器或处理器的电路，并且光学集成电路传送具有非常高带宽的光信号。 此外，集成电路的前表面电耦合到插入件的顶表面，并且该顶表面又电耦合到面向顶表面的输入/输出（I / O）集成电路的前表面 。 此外，I / O集成电路的前表面电耦合到光集成电路的顶表面，其中光集成电路的顶表面面向I / O集成电路的前表面。

公开(公告)号：US09078361B2

公开(公告)日：2015-07-07

申请号：US13575036

申请日：2011-01-31

Applicant: Gerardus Titus Van Heck ,  Margaretha Maria De Kok ,  Jeroen Van Den Brand

Inventor： Gerardus Titus Van Heck ,  Margaretha Maria De Kok ,  Jeroen Van Den Brand

IPC: H05K1/02 ,  H01L27/32 ,  H01L51/52 ,  H01R4/70 ,  H05K3/36 ,  H05B33/08 ,  H05B33/10 ,  H05K13/04 ,  H01L31/0392 ,  H01L31/042 ,  G09F9/00 ,  G09F19/22 ,  H01R4/04 ,  H01R12/70 ,  H05K1/03 ,  H05K1/14 ,  H05K1/18 ,  H05K3/32

CPC classification number: H05K1/0277 ,  G09F9/00 ,  G09F19/22 ,  H01L27/3293 ,  H01L31/0392 ,  H01L31/042 ,  H01L51/5203 ,  H01L2251/5338 ,  H01L2251/5361 ,  H01R4/04 ,  H01R4/70 ,  H01R12/7076 ,  H05B33/0896 ,  H05B33/10 ,  H05K1/0283 ,  H05K1/038 ,  H05K1/147 ,  H05K1/189 ,  H05K3/321 ,  H05K3/325 ,  H05K3/365 ,  H05K13/04 ,  H05K2201/029 ,  H05K2201/0311 ,  H05K2201/046 ,  H05K2201/083 ,  H05K2201/09081 ,  H05K2201/09281 ,  H05K2201/10106 ,  H05K2201/10287 ,  H05K2201/10484 ,  Y02E10/50 ,  Y10T29/4913

Abstract: An assembly is provided of an electro-physical transducer (10) on a flexible foil (20) with a carrier (40). The flexible foil (20) has a first main surface (22) provided with at least a first electrically conductive track (24) connected to the electro-physical transducer and opposite said first main surface a second main surface (23) facing towards the carrier. At least a first incision (25a) extends through the flexible foil alongside said at least a first electrically conductive track, therewith defining a strip shaped portion (27) of the flexible foil that carries a portion of the at least a first electrically conductive track. The at least a first electrically conductive track is electrically connected to an electrical conductor (421) of the carrier, and the flexible foil is attached to the carrier with its strip shaped portion.

Abstract translation: 在具有载体（40）的柔性箔（20）上提供由电 - 物理传感器（10）组成的组件。 柔性箔（20）具有第一主表面（22），第一主表面（22）设置有至少第一导电轨道（24），第一导电轨道（24）连接到电物理换能器并与所述第一主表面相对，第二主表面（23）面向载体 。 至少第一切口（25a）沿着所述至少第一导电轨道延伸穿过柔性箔片，从而限定柔性箔片的带状部分（27），其承载至少第一导电轨道的一部分。 至少第一导电轨道电连接到载体的电导体（421），并且柔性箔片与其带状部分连接到载体上。

公开(公告)号：US20140321803A1

公开(公告)日：2014-10-30

申请号：US14047910

申请日：2013-10-07

Applicant: Oracle International Corporation

Inventor： Hiren D. Thacker ,  Frankie Y. Liu ,  Robert David Hopkins, II ,  Jon Lexau ,  Xuezhe Zheng ,  Guoliang Li ,  Ivan Shubin ,  Ronald Ho ,  John E. Cunningham ,  Ashok V. Krishnamoorthy

IPC: G02B6/12

CPC classification number: G02B6/4274 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/72 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/0401 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/72 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06534 ,  H01L2225/06589 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/37001 ,  H05K3/36 ,  H05K2201/10484 ,  H01L2924/00

Abstract: A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit by a top surface of the interposer, where the top surface faces the front surface of the integrated circuit and the front surface of the optical integrated circuit. Furthermore, the integrated circuit and the optical integrated circuit may be on a same side of the interposer. By integrating the optical integrated circuit and the integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.

Abstract translation: 芯片封装包括与芯片封装中的每一个相邻的光学集成电路（例如混合集成电路）和集成电路。 集成电路包括诸如存储器或处理器的电路，并且光学集成电路传送具有非常高带宽的光信号。 此外，集成电路的前表面通过插入件的顶表面电耦合到光集成电路的前表面，其中顶表面面向集成电路的前表面和光集成电路的前表面 。 此外，集成电路和光集成电路可以在插入器的同一侧上。 通过将光集成电路和集成电路集成在一起，与具有电互连的芯片封装相比，芯片封装可以有助于提高性能。

公开(公告)号：US20130201636A1

公开(公告)日：2013-08-08

申请号：US13574630

申请日：2011-01-31

Applicant: Jeroen Van Den Brand ,  Gerardus Titus Van Heck ,  Margaretha Maria De Kok

Inventor： Jeroen Van Den Brand ,  Gerardus Titus Van Heck ,  Margaretha Maria De Kok

IPC: H05K1/02 ,  H05K13/04

CPC classification number: H05K1/0277 ,  G09F9/00 ,  G09F19/22 ,  H01L27/3293 ,  H01L31/0392 ,  H01L31/042 ,  H01L51/5203 ,  H01L2251/5338 ,  H01L2251/5361 ,  H01R4/04 ,  H01R4/70 ,  H01R12/7076 ,  H05B33/0896 ,  H05B33/10 ,  H05K1/0283 ,  H05K1/038 ,  H05K1/147 ,  H05K1/189 ,  H05K3/321 ,  H05K3/325 ,  H05K3/365 ,  H05K13/04 ,  H05K2201/029 ,  H05K2201/0311 ,  H05K2201/046 ,  H05K2201/083 ,  H05K2201/09081 ,  H05K2201/09281 ,  H05K2201/10106 ,  H05K2201/10287 ,  H05K2201/10484 ,  Y02E10/50 ,  Y10T29/4913

Abstract: An assembly of a plurality of tiles (1) with a carrier (40). The tiles (1) comprise a foil (20) with an electro-physical transducer (10) and electrical connectors (24, 28) to said transducer. The tiles are mechanically and electrically coupled to the carrier in a connection portion (1c) of said tiles.

Abstract translation: 具有载体（40）的多个瓦片（1）的组件。 瓦片（1）包括具有电物理换能器（10）的箔（20）和到所述换能器的电连接器（24,28）。 所述瓦片在所述瓦片的连接部分（1c）中机械地和电耦合到所述载体。