公开(公告)号：US06759734B2

公开(公告)日：2004-07-06

申请号：US10100371

申请日：2002-03-14

Applicant: John H. Jerman ,  John D. Grade

Inventor： John H. Jerman ,  John D. Grade

IPC: H01L2302

CPC classification number: B81B3/0086 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81C2201/0178

Abstract: The present invention provides a miniature device that comprises a grounded layer, an insulative layer overlying the grounded layer and a conductive layer overlying the insulative layer wherein the insulative spacing between the conductive and grounded layers is increased so as to inhibit electrical shorting between the conductive layer and grounded layers. A method of making miniature devices is also provided.

Abstract translation: 本发明提供一种微型器件，其包括接地层，覆盖接地层的绝缘层和覆盖绝缘层的导电层，其中导电层和接地层之间的绝缘间距增加，以便抑制导电层之间的电短路 和接地层。 还提供了制造微型装置的方法。

公开(公告)号：US20040021186A1

公开(公告)日：2004-02-05

申请号：US10381046

申请日：2003-03-25

Inventor： Mika Okumura ,  Makio Horikawa ,  Kiyoshi Ishibashi

IPC: H01L021/00 ,  H01L029/82 ,  H01L021/469

CPC classification number: H01L21/02255 ,  B81B2201/0235 ,  B81B2203/0307 ,  B81B2207/07 ,  B81C1/00365 ,  B81C2201/0178 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02238 ,  H01L21/02271 ,  H01L21/31612 ,  H01L21/31662

Abstract: The present invention relates to a substrate and a manufacturing method thereof as well as a thin-film structural body, and an object thereof is to provide a substrate capable of reducing a stress difference generating between an oxide film on the substrate and another film formed on the oxide film upon thermal shrinkage and also shortening the time required for film formation at the time of forming a thick oxide film, and a manufacturing method thereof as well as a thin-film structural body. In order to achieve the above object, this substrate (1) is provided with a substrate main body (31) made from silicon, and an oxide film (33) for a base formed thereon. The oxide film (33) includes a first oxide film (61) made of a thermal SiO2 film formed by thermally oxidizing silicon in the substrate main body (31), and a second oxide film (63) made of a high-temperature oxide film deposited and formed thereon.

Abstract translation: 本发明涉及一种基板及其制造方法以及薄膜结构体，其目的在于提供一种基板，其能够减小基板上的氧化物膜和形成于基板上的另一膜之间的应力差产生 热收缩时的氧化膜，缩短形成厚氧化膜时的成膜所需的时间及其制造方法以及薄膜结构体。 为了实现上述目的，该基板（1）设置有由硅制成的基板主体（31）和形成在其上的基座用氧化膜（33）。 氧化膜（33）包括由在基板主体（31）中热氧化硅而形成的热SiO2膜构成的第一氧化膜（61）和由高温氧化膜 沉积并形成在其上。

公开(公告)号：US20030124758A1

公开(公告)日：2003-07-03

申请号：US10322990

申请日：2002-12-18

Inventor： Scott G. Adams ,  Scott A. Miller

IPC: H01L021/00

CPC classification number: H01L21/76229 ,  B81B3/0086 ,  B81B2203/033 ,  B81C1/00126 ,  B81C2201/0178 ,  H01L21/31612 ,  H01L21/31662 ,  H01L21/76208

Abstract: A method of manufacturing an insulating micro-structure by etching a plurality of trenches in a silicon substrate and filling said trenches with insulating materials. The trenches are etched and then oxidized until completely or almost completely filled with silicon dioxide. Additional insulating material is then deposited as necessary to fill any remaining trenches, thus forming the structure. When the top of the structure is metallized, the insulating structure increases voltage resistance and reduces the capacitive coupling between the metal and the silicon substrate. Part of the silicon substrate underlying the structure is optionally removed further to reduce the capacitive coupling effect. Hybrid silicon-insulator structures can be formed to gain the effect of the benefits of the structure in three-dimensional configurations, and to permit metallization of more than one side of the structure.

Abstract translation: 通过蚀刻硅衬底中的多个沟槽并用绝缘材料填充所述沟槽来制造绝缘微结构的方法。 蚀刻沟槽，然后氧化直到完全或几乎完全充满二氧化硅。 然后根据需要沉积额外的绝缘材料以填充任何剩余的沟槽，从而形成结构。 当结构的顶部被金属化时，绝缘结构增加了电阻并降低了金属和硅衬底之间的电容耦合。 可选地，进一步去除结构底层的硅衬底的一部分以降低电容耦合效应。 可以形成混合硅 - 绝缘体结构以获得三维结构中结构的益处的效果，并且允许结构多于一侧的金属化。

公开(公告)号：US20030019832A1

公开(公告)日：2003-01-30

申请号：US10076296

申请日：2002-02-13

Applicant: The Regents of the University of California

Inventor： Robert A. Conant ,  Jocelyn T. Nee ,  Kam-Yin Lau ,  Richard S. Muller

IPC: C23F001/00

CPC classification number: B81C1/00182 ,  B81B2201/042 ,  B81B2203/0136 ,  B81C2201/0178 ,  B81C2203/032 ,  G02B26/0841

Abstract: A staggered torsional electrostatic combdrive includes a stationary combteeth assembly and a moving combteeth assembly with a mirror and a torsional hinge. The moving combteeth assembly is positioned entirely above the stationary combteeth assembly by a predetermined vertical displacement during a combdrive resting state. A method of fabricating the staggered torsional electrostatic combdrive includes the step of deep trench etching a stationary combteeth assembly in a first wafer. A second wafer is bonded to the first wafer to form a sandwich including the first wafer, an oxide layer, and the second wafer. A moving combteeth assembly is formed in the second wafer. The moving combteeth assembly includes a mirror and a torsional hinge. The moving combteeth assembly is separated from the first wafer by the oxide layer. The oxide layer is subsequently removed to release the staggered torsional electrostatic combdrive.

Abstract translation: 交错的扭转静电梳状驱动器包括固定的组合组件和具有反射镜和扭转铰链的移动梳状组件。 移动的组合组件在梳齿装置静止状态期间完全位于固定组合组件上方预定的垂直位移。 制造交错扭转静电梳齿驱动器的方法包括在第一晶片中深沟槽蚀刻静止梳组件的步骤。 第二晶片结合到第一晶片以形成包括第一晶片，氧化物层和第二晶片的夹层。 在第二晶片中形成移动的组合组件。 移动的组合组件包括反射镜和扭转铰链。 移动的组合组件通过氧化物层与第一晶片分离。 随后去除氧化物层以释放交错的扭转静电梳状驱动。

公开(公告)号：US20020149292A1

公开(公告)日：2002-10-17

申请号：US10100371

申请日：2002-03-14

Inventor： John H. Jerman ,  John D. Grade

IPC: H02N001/00

CPC classification number: B81B3/0086 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81C2201/0178

Abstract: The present invention provides a miniature device that comprises a grounded layer, an insulative layer overlying the grounded layer and a conductive layer overlying the insulative layer wherein the insulative spacing between the conductive and grounded layers is increased so as to inhibit electrical shorting between the conductive layer and grounded layers. A method of making miniature devices is also provided.

Abstract translation: 本发明提供一种微型器件，其包括接地层，覆盖接地层的绝缘层和覆盖绝缘层的导电层，其中导电层和接地层之间的绝缘间距增加，以便抑制导电层之间的电短路 和接地层。 还提供了制造微型装置的方法。

公开(公告)号：US20020127760A1

公开(公告)日：2002-09-12

申请号：US09922590

申请日：2001-08-02

Inventor： Jer-Liang Yeh ,  Norman C. Tien

IPC: H01L021/00

CPC classification number: B81C1/00619 ,  B81B2203/0136 ,  B81C1/00182 ,  B81C2201/0132 ,  B81C2201/0178 ,  B81C2201/056 ,  H04R19/005

Abstract: The present invention provides a fabrication process that integrates high-aspect-ratio silicon structures with polysilicon surface micromachined structures. In some embodiments the process includes forming an oxide block by etching a plurality of trenches to leave a plurality of vertical-walled silicon structures standing on the substrate, thermally and substantially completely oxidizing the vertical-walled silicon structures, and substantially filling spaces between the oxidized vertical-walled silicon structures with an oxide of silicon to form the oxide block. The process retains not only the high-aspect-ratio silicon structures possible with deep reactive ion etching (DRIE) but also the design flexibility of polysilicon surface micromachining. Using this process, polysilicon platforms have been fabricated, which are actuated by high-aspect-ratio combdrives for many applications such as x-y-z stages and scanning devices. The actuators include an asymmetric combdrive that actuates in torsional/out-of-plane motions, and a high-aspect-ratio combdrive that drives in translational motion.

Abstract translation: 本发明提供了一种将高纵横比硅结构与多晶硅表面微加工结构相集成的制造工艺。 在一些实施方案中，该方法包括通过蚀刻多个沟槽来形成氧化物块，以留下多个垂直壁硅结构站立在衬底上，热并基本上完全氧化垂直壁硅结构，并且基本上填充氧化的 具有硅氧化物的垂直壁硅结构以形成氧化物块。 该过程不仅保留了高纵横比的硅结构，而且可以通过深反应离子蚀刻（DRIE）进行，而且还保留了多晶硅表面微机械加工的设计灵活性。 使用这个过程，已经制造了多晶硅平台，其由用于诸如x-y-z级和扫描装置的许多应用的高纵横比梳齿驱动。 致动器包括在扭转/超平面运动中致动的非对称梳齿驱动器以及在平移运动中驱动的高纵横比梳齿驱动。

公开(公告)号：US5930595A

公开(公告)日：1999-07-27

申请号：US950776

申请日：1997-10-15

Applicant: Uppili Sridhar ,  Liu Lian Jun ,  Foo Pang Dow ,  Lo Yong Hong ,  Maio Yu Bo

Inventor： Uppili Sridhar ,  Liu Lian Jun ,  Foo Pang Dow ,  Lo Yong Hong ,  Maio Yu Bo

IPC: B81B3/00 ,  B81C1/00 ,  G01L9/00 ,  G01P15/08 ,  H01L21/62

CPC classification number: B81C1/00246 ,  B81B3/0086 ,  G01L9/0042 ,  G01P15/0802 ,  B81B2203/0307 ,  B81B2203/033 ,  B81C2201/0178 ,  B81C2201/053 ,  B81C2203/0735

Abstract: A novel process for fabricating an integrated circuit sensor/actuator is described. Silicon islands are created by forming deep trenches in a substrate and lining the trenches with oxide. This forms silicon islands substantially surrounded by electrically isolating oxide. The anchor portion of the sensor/actuator beams is connected to the islands and is released from the substrate and therefore is also electrically isolated from the substrate. The IC sensor/actuator is manufactured by forming deep trenches in a substrate. These trenches preferably surrounding substrate material on three sides and the bottom, thus creating "islands" of substrate material surrounded by trenches and leaving one side of the island uncovered by the trench; lining the trenches with electrically insulating material, such as an oxide, thus surrounding the substrate material island with an electrical insulator; forming sensor/actuator beams in the substrate material such that the beams contact the uncovered portion of the islands; and using release etching, isolating the sensor/actuator beams from the substrate. The island/beam structure may be connected to a CMOS or other IC structure using conventional metalization processes.

Abstract translation: 描述了用于制造集成电路传感器/致动器的新颖方法。 通过在衬底中形成深沟槽并用氧化物衬套沟槽来产生硅岛。 这形成了基本上被隔离氧化物包围的硅岛。 传感器/致动器光束的锚固部分连接到岛上并从衬底释放，因此也与衬底电隔离。 通过在衬底中形成深沟槽来制造IC传感器/致动器。 这些沟槽优选地围绕三面和底部的衬底材料，由此产生由沟槽围绕的衬底材料的“岛”，并且使岛的一侧未被沟槽覆盖; 用电绝缘材料（例如氧化物）衬套沟槽，由此用电绝缘体围绕衬底材料岛; 在基底材料中形成传感器/致动器光束，使得光束接触岛的未覆盖部分; 并使用释放蚀刻，将传感器/致动器光束与衬底隔离。 岛/光束结构可以使用传统的金属化工艺连接到CMOS或其他IC结构。

公开(公告)号：WO2012033397A1

公开(公告)日：2012-03-15

申请号：PCT/MY2011/000047

申请日：2011-05-18

Applicant: MIMOS BERHAD ,  BIEN CHIA SHENG, Daniel

Inventor： BIEN CHIA SHENG, Daniel

IPC: B81C1/00

CPC classification number: B81C1/00071 ,  B81B2201/058 ,  B81C2201/0178

Abstract: The present invention provides a method of fabricating a fluidic device having one or more nano-sized channels. The method comprises etching a silicon-based substrate to form one or more channels of the desire shape and configuration; oxidizing the etched silicon-based substrate to grow a layer of silicon dioxide to miniaturize the one or more channels; encapsulating the one or more miniaturized channels with another substrate. A fluidic device fabricated by the aforementioned method is also provided.

Abstract translation: 本发明提供一种制造具有一个或多个纳米尺寸通道的流体装置的方法。 该方法包括蚀刻硅基衬底以形成所需形状和构型的一个或多个通道; 氧化蚀刻的硅基衬底以生长一层二氧化硅以使一个或多个通道小型化; 将一个或多个小型化通道与另一基板封装。 还提供了通过上述方法制造的流体装置。

公开(公告)号：WO2011009869A1

公开(公告)日：2011-01-27

申请号：PCT/EP2010/060497

申请日：2010-07-20

Applicant: MONTRES BREGUET SA ,  KARAPATIS, Nakis

Inventor： KARAPATIS, Nakis

IPC: B81C1/00

CPC classification number: B81C1/00682 ,  B81B2201/035 ,  B81C1/00674 ,  B81C2201/0178 ,  Y10T29/49986

Abstract: Le procédé de fabrication d'une pièce micromécanique en silicium renforcé comporte les étapes de : - micro-usiner la pièce, ou un lot de pièces dans une plaquette de silicium; - former, sur toute la surface de la pièce, en une ou plusieurs étapes, une couche de dioxyde de silicium, de manière à obtenir une épaisseur de dioxyde de silicium au moins cinq fois supérieure à l'épaisseur d'un dioxyde de silicium natif; - retirer la couche de dioxyde de silicium par attaque chimique.

Abstract translation: 本发明涉及一种用于制造由增强硅制成的微机械部件的方法，包括以下步骤：在硅晶片中微加工所述部件或一批部件; 在一个或多个步骤中并在整个表面上形成二氧化硅层，以获得比天然二氧化硅的厚度大至少五倍的二氧化硅的厚度; 并通过化学侵蚀去除二氧化硅层。

公开(公告)号：WO2009059850A3

公开(公告)日：2009-12-03

申请号：PCT/EP2008063151

申请日：2008-10-01

Applicant: BOSCH GMBH ROBERT ,  SCHMITZ VOLKER ,  GROSSE AXEL

Inventor： SCHMITZ VOLKER ,  GROSSE AXEL

IPC: B81C1/00

CPC classification number: B81C1/00484 ,  B81C1/0015 ,  B81C2201/0178

Abstract: The invention relates to a micromechanical component comprising a functional region and a carrier substrate, the carrier substrate comprising a trench structure parallel to the main extension plane of the carrier substrate. The surface of the trench structure has a cover forming part of a first insulation layer, and the trench structure has an upper surface plane parallel to the main extension plane and extending through an upper edge of the carrier substrate of the trench structure. At least one trench of the trench structure is filled with a semiconductor material, the functional region being arranged in a direction perpendicular to the main extension plane, beneath the upper surface plane of the carrier substrate.

Abstract translation: 建议用一个功能区域和载体衬底是微机械器件，其中所述载体基片具有平行于载体基板的主平面，其中所述严重结构的表面包括覆盖由第一绝缘层和严重结构，其中所述的严重结构平行的上表面平面的主平面并穿过 具有严重结构的支撑基板和的上边缘进一步地，其中所述的严重的沟槽结构填充有至少一个半导体材料，其中，所述功能区域被垂直于载体衬底的顶表面平面下方的主平面方向的方向排列。