公开(公告)号：WO2022015363A1

公开(公告)日：2022-01-20

申请号：PCT/US2021/012018

申请日：2021-01-03

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： SHAGA, Ganesh ,  SMITH, Kevin Mark, Jr. ,  CHOI, Hwangsoo ,  PUTTAPUDI, Sudheer

IPC: G01D5/20 ,  G01D5/22

Abstract: An angular position sensor comprising two planar excitation coils forming a substantially circular interior area and two planar sensing coils positioned within a minor sector of the substantially circular interior area. Each of the two planar sensing coils comprises a clockwise winding portion and a counter-clockwise winding portion. The angular position sensor further comprises a substantially circular rotatable inductive coupling element positioned in overlying relation to the two planar sensing coils and separated from the two planar sensing coils by an airgap, wherein the substantially circular rotatable inductive coupling element comprises three, substantially evenly space, sector apertures.

公开(公告)号：WO2021231123A1

公开(公告)日：2021-11-18

申请号：PCT/US2021/030517

申请日：2021-05-03

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： RABB, Jason

IPC: H02M1/00 ,  H02M3/07 ,  H02M3/156

Abstract: A system and method for generating a low supply voltage and a high supply voltage from an input voltage, wherein the dependency of the high supply voltage magnitude on the magnitude of the input voltage is removed and the resulting high supply voltage magnitude is a multiple of the low supply voltage magnitude. The low supply voltage and the high voltage may be implemented in a power converter of a communication system comprising a plurality of subscriber line interface circuits (SLICs).

公开(公告)号：WO2021126309A1

公开(公告)日：2021-06-24

申请号：PCT/US2020/038947

申请日：2020-06-22

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： WILLINGHAM, Mike

IPC: H03L7/099 ,  H03L7/16 ,  G06F1/02 ,  H03K5/135 ,  G06F1/022 ,  H03L7/081 ,  H03L7/104

Abstract: A circuit for correcting phase interpolator rollover integral non-linearity errors includes a rollover detector circuit for detecting when an interpolator rollover event of a phase integer portion of a phase interpolator has occurred, and a correction circuit that adds a signed predistortion correction to the VCO clock cycle fraction value of the phase interpolator when the rollover detector circuit has detected the interpolator rollover event.

公开(公告)号：WO2021045795A1

公开(公告)日：2021-03-11

申请号：PCT/US2019/060500

申请日：2019-11-08

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： MCCOLLUM, John L.

IPC: G11C29/00

Abstract: A method for providing error correction for a memory array includes for each memory word stored in a data memory portion of the memory array (12) having at least one bit error, storing in an error PROM (24) error data identifying a memory address for the data word in the data memory portion, a bit position of each bit error, and correct bit data for each bit error, monitoring memory addresses presented to the data PROM, if a memory address presented to the data memory portion is an identified memory address, reading from the error PROM (24) the bit position of each bit error and the correct bit data for each bit error, and substituting the correct bit data into each identified bit position of a sense amplifier (16) reading data from the data memory portion. A counter (42) is used decode multiple bit errors in a data word which allows separate entries being programmed in the PROM read decoder section (30) for each bit error in a data word.

公开(公告)号：WO2021040761A1

公开(公告)日：2021-03-04

申请号：PCT/US2019/061400

申请日：2019-11-14

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： CALDWELL, Robert E., Jr.

IPC: G11B5/48 ,  G11B5/55

Abstract: A method for writing data to a dual-actuator disk drive includes providing a multi-actuator disk drive having a first actuator communicating with first disk platters and a second actuator communicating with second disk platters, receiving in a storage controller a data stream including groups of blocks of data to be written to the multi-actuator disk drive, alternately distributing from a disk controller in the disk drive sequential ones of the groups of blocks of data from the data stream to the first actuator and the second actuator as defined by commands from the storage controller, and simultaneously writing from the first actuator to the at least one first disk platter ones of the groups of blocks of data routed to the first actuator and writing from the second actuator to the at least one second disk platter ones of the groups of blocks of data routed to the second actuator.

公开(公告)号：WO2020247003A1

公开(公告)日：2020-12-10

申请号：PCT/US2019/044812

申请日：2019-08-02

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： GORSHE, Steven Scott ,  MOK, Winston

IPC: H04L29/08 ,  H04L12/00

Abstract: A method for inserting path overhead, POH, data blocks (60) and a Metro Transport Network ordered set, MOS, control block (62) into a data stream (68) in a source node of a 64B/66B-block communication link, the method comprising: generating a MOS control block (62) by assembling MOS control data into a 64B/66B block; generating K POH data blocks (60) by assembling POH data into K 64B/66B blocks; and inserting the MOS control block (62) and the K POH data blocks (62) into predetermined locations in the data stream in the 64B/66B-block communication link.

公开(公告)号：WO2013130252A1

公开(公告)日：2013-09-06

申请号：PCT/US2013/025561

申请日：2013-02-11

Applicant: MICROCHIP TECHNOLOGY INC. ,  SHETTY, Santosh ,  CHAO, Shih-chung

Inventor： SHETTY, Santosh ,  CHAO, Shih-chung

IPC: H04N7/26

CPC classification number: H04N19/152 ,  H04N19/107 ,  H04N19/124

Abstract: A system, circuit and method are provided herein for reducing perceived flicker in video images transmitted using compression and bit rate control. According to one embodiment of the method, a parameter used in the video compression scheme is stored. The parameter stored is one that is subject to adjustment during normal operation of the video compression scheme. Compressed video frame data issued by a compression encoder is used to test for a still-picture condition. When a still-picture condition is detected, the value of the parameter used by the video compression scheme is fixed to the stored value for the duration of the still-picture condition. An embodiment of the system includes an encoder, buffer, bit rate controller, and flicker reduction circuit. An embodiment of the flicker reduction circuit includes a still-picture detection circuit operably coupled to a compressed data path beginning at the output of the encoder.

Abstract translation: 本文提供了一种用于减少使用压缩和比特率控制传输的视频图像中感知到的闪烁的系统，电路和方法。 根据该方法的一个实施例，存储在视频压缩方案中使用的参数。 存储的参数是在视频压缩方案的正常操作期间进行调整的参数。 由压缩编码器发出的压缩视频帧数据用于测试静止图像条件。 当检测到静止图像条件时，视频压缩方案使用的参数的值在静止图像条件的持续时间内固定为存储的值。 系统的一个实施例包括编码器，缓冲器，比特率控制器和闪烁减少电路。 闪烁降低电路的实施例包括可操作地耦合到从编码器的输出开始的压缩数据路径的静止图像检测电路。

公开(公告)号：WO1997045959A1

公开(公告)日：1997-12-04

申请号：PCT/US1997006482

申请日：1997-04-12

Applicant: MICROCHIP TECHNOLOGY, INC.

Inventor： MICROCHIP TECHNOLOGY, INC. ,  HULL, Richard, L. ,  BINGHAM, Gregory ,  FINK, Scott ,  ROGERS, James, Clark ,  ELLISON, Scott

IPC: H03L07/00

CPC classification number: H03K17/164 ,  G06F1/08 ,  G06F15/7814 ,  H03K3/0231 ,  Y02D10/12 ,  Y02D10/13

Abstract: The present invention relates to a microcontroller that may be configured to operate without the accompaniment of any external components. The microcontroller can function in a proper manner from the application of only power and signal lines with no external components required. The microcontroller (10) has integrated internal reset (14) and oscillator (16) circuitry into the microcontroller. The microcontroller has also integrated simple external components such as current limiting resistors and pull up and pull down resistors into the microcontroller in order to avoid application specific external components.

Abstract translation: 本发明涉及一种微控制器，其可被配置为在没有任何外部部件的伴随的情况下运行。 微控制器可以以适当的方式运行，仅应用电源和信号线，无需外部元件。 微控制器（10）将内部复位（14）和振荡器（16）电路集成到微控制器中。 微控制器还集成了简单的外部组件，例如限流电阻，并将电阻上拉和下拉到微控制器中，以避免应用特定的外部组件。

公开(公告)号：WO1997045956A1

公开(公告)日：1997-12-04

申请号：PCT/US1997007242

申请日：1997-04-12

Applicant: MICROCHIP TECHNOLOGY, INC.

Inventor： MICROCHIP TECHNOLOGY, INC. ,  COOPER, Russell, E. ,  ELLISON, Scott

IPC: H03K03/0231

CPC classification number: H03K3/0231

Abstract: An RC oscillator circuit (10) within a microcontroller chip includes first and second comparators (16, 18) having their outputs respectively coupled to set and reset inputs of a flip-flop (20) whose output is coupled to a series RC network (22, 14) for controlling charging and discharging of a capacitor (14) of the RC network between precise high and low voltage levels (V2 and V1). One input of each comparator is coupled to the RC network, while the second input is coupled to a respective modified high and low threshold voltage level (Vh', V1'), so that the oscillator signal does not exceed the precise high and low voltage levels (V2, V1). The output frequency of the oscillator may be adjusted by selecting different values of the low voltage level (V1).

Abstract translation: 微控制器芯片内的RC振荡器电路（10）包括第一和第二比较器（16,18），它们的输出分别耦合到触发器（20）的输入耦合到串联RC网络（22）的触发器（20）的设置和复位输入 ，14），用于控制RC网络的电容器（14）在精确的高电平和低电压电平（V2和V1）之间的充电和放电。 每个比较器的一个输入端耦合到RC网络，而第二个输入耦合到相应修改的高和低阈值电压电平（Vh'，V1'），使得振荡器信号不超过精确的高低电压 水平（V2，V1）。 可以通过选择不同的低电平电平（V1）来调节振荡器的输出频率。

公开(公告)号：WO1993010501A1

公开(公告)日：1993-05-27

申请号：PCT/US1992009466

申请日：1992-11-12

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： MICROCHIP TECHNOLOGY INC. ,  BERMAN, Eric ,  ITALIANO, Greg ,  PADGAONKAR, Ajay ,  ALLEN, Ray

IPC: G06F15/20

CPC classification number: G06F9/30145 ,  G06F9/30167 ,  G06F11/2236 ,  G06F11/261 ,  G06F15/7814

Abstract: A microcontroller (10) fabricated on a semiconductor chip has an on-chip EPROM program memory (17) with programmable EPROM configuration fuses located in a limited number of addresses (32) of the on-chip EPROM program memory, the condition of each of EPROM fuses being defined as blown or not blown according to the value of the bit stored in the respective address on the on-chip EPROM program memory. The operating modes of the microcontroller are configurable by appropriately programming at least some of the EPROM fuses. Testing of the microcontroller in at least some of the operating modes is achieved by using latches outside the on-chip EPROM program memory to emulate the EPROM fuses, while suppressing the capability to set the condition of the EPROM fuses during the testing. Upon completion of the testing, control of the operating modes of the microcontroller is returned to EPROM fuses, and the latches are precluded from further emulating the EPROM fuses.

Abstract translation: 制造在半导体芯片上的微控制器（10）具有片上EPROM程序存储器（17），其具有位于片上EPROM程序存储器的有限数量的地址（32）中的可编程EPROM配置熔丝，每个 根据存储在片上EPROM程序存储器的相应地址中的位的值，EPROM保险丝被定义为被烧断或不被吹送。 微控制器的工作模式可以通过适当地编程至少一些EPROM保险丝进行配置。 通过使用片上EPROM程序存储器外的锁存器来模拟EPROM保险丝，同时抑制在测试期间设置EPROM保险丝的状态的能力，可以实现至少一些操作模式下的微控制器的测试。 完成测试后，微控制器的工作模式的控制返回到EPROM保险丝，锁存器不再进一步仿真EPROM保险丝。