公开(公告)号：WO1993010501A1

公开(公告)日：1993-05-27

申请号：PCT/US1992009466

申请日：1992-11-12

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： MICROCHIP TECHNOLOGY INC. ,  BERMAN, Eric ,  ITALIANO, Greg ,  PADGAONKAR, Ajay ,  ALLEN, Ray

IPC: G06F15/20

CPC classification number: G06F9/30145 ,  G06F9/30167 ,  G06F11/2236 ,  G06F11/261 ,  G06F15/7814

Abstract: A microcontroller (10) fabricated on a semiconductor chip has an on-chip EPROM program memory (17) with programmable EPROM configuration fuses located in a limited number of addresses (32) of the on-chip EPROM program memory, the condition of each of EPROM fuses being defined as blown or not blown according to the value of the bit stored in the respective address on the on-chip EPROM program memory. The operating modes of the microcontroller are configurable by appropriately programming at least some of the EPROM fuses. Testing of the microcontroller in at least some of the operating modes is achieved by using latches outside the on-chip EPROM program memory to emulate the EPROM fuses, while suppressing the capability to set the condition of the EPROM fuses during the testing. Upon completion of the testing, control of the operating modes of the microcontroller is returned to EPROM fuses, and the latches are precluded from further emulating the EPROM fuses.

Abstract translation: 制造在半导体芯片上的微控制器（10）具有片上EPROM程序存储器（17），其具有位于片上EPROM程序存储器的有限数量的地址（32）中的可编程EPROM配置熔丝，每个 根据存储在片上EPROM程序存储器的相应地址中的位的值，EPROM保险丝被定义为被烧断或不被吹送。 微控制器的工作模式可以通过适当地编程至少一些EPROM保险丝进行配置。 通过使用片上EPROM程序存储器外的锁存器来模拟EPROM保险丝，同时抑制在测试期间设置EPROM保险丝的状态的能力，可以实现至少一些操作模式下的微控制器的测试。 完成测试后，微控制器的工作模式的控制返回到EPROM保险丝，锁存器不再进一步仿真EPROM保险丝。

公开(公告)号：WO1993010498A1

公开(公告)日：1993-05-27

申请号：PCT/US1992009465

申请日：1992-11-12

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： MICROCHIP TECHNOLOGY INC. ,  BURGHARDT, Martin ,  BERMAN, Eric ,  PADGAONKAR, Ajay ,  ALLEN, Ray

IPC: G06F12/14

CPC classification number: G06F12/1433

Abstract: A microcontroller fabricated on a semiconductor chip has an on-chip EPROM program memory. The microcontroller operates in any one plurality of operating modes, including a secure microcontroller mode. A plurality of EPROM configuration fuses are mapped into the on-chip EPROM program memory as bits in respective address locations for configuring and protecting the microcontroller program memory from read, verify or write instructions initiated from other than a secure area of the chip. The value of a bit representing one of said fuses reflects the condition of the respective fuse. That condition is observed by reading the value of the respective bit for that fuse stored in the EPROM program memory. The chip security is enabled by configuring the microcontroller in a code protected mode by programming the bits representing the desired fuses in the EPROM program memory to blow or erase each fuse according to the desired configuration.

Abstract translation: 在半导体芯片上制造的微控制器具有片上EPROM程序存储器。 微控制器以任何多种操作模式工作，包括安全的微控制器模式。 多个EPROM配置熔丝被映射到片上EPROM程序存储器中，作为用于配置和保护微控制器程序存储器的读取，验证或写入从芯片的安全区域以外的指令发起的相应地址位置中的位。 代表所述保险丝之一的位的值反映了各个保险丝的状态。 通过读取存储在EPROM程序存储器中的该熔丝的相应位的值来观察该条件。 通过在EPROM程序存储器中编程表示所需保险丝的位来根据所需的配置对每个保险丝进行烧断或擦除，通过将代码保护模式下的微控制器配置为使能芯片的安全性。

公开(公告)号：EP0612422A1

公开(公告)日：1994-08-31

申请号：EP92924264.0

申请日：1992-11-12

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： BERMAN, Eric ,  ITALIANO, Greg ,  PADGAONKAR, Ajay ,  ALLEN, Ray

IPC: G06F9 ,  G06F11 ,  G06F15

CPC classification number: G06F9/30145 ,  G06F9/30167 ,  G06F11/2236 ,  G06F11/261 ,  G06F15/7814

Abstract: Un microcontrôleur (10) construit sur une puce à semi-conducteur comprend une mémoire de programme EPROM (10) sur puce, pourvue de fusibles de configuration EPROM placés dans un nombre limité d'adresses (32) de la mémoire de programme EPROM sur puce, l'état de chacun des fusibles EPROM étant défini comme ayant sauté ou non, selon la valeur du bit stocké dans l'adresse respective de la mémoire de programme EPROM. Les modes de fonctionnement du microcontrôleur peuvent être configurés par une programmation appropriée d'au moins quelques-uns des fusibles. On met à l'essai le microcontrôleur, en certains modes de fonctionnement, au moins, en utilisant des bascules de verrouillage situées hors de la mémoire de programme EPROM sur puce pour émuler les fusibles EPROM, tout en supprimant la possibilité de régler l'état des fusibles EPROM au cours de l'essai. Lorsque celui-ci est terminé, la commande des modes de fonctionnement du microcontrôleur est retournée aux fusibles EPROM, et on ne permet plus aux bascules de continuer à émuler les fusibles EPROM.

公开(公告)号：EP0612422B1

公开(公告)日：2000-07-05

申请号：EP92924264.2

申请日：1992-11-12

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： BERMAN, Eric ,  ITALIANO, Greg ,  PADGAONKAR, Ajay ,  ALLEN, Ray

IPC: G06F11/20 ,  G11C29/00

CPC classification number: G06F9/30145 ,  G06F9/30167 ,  G06F11/2236 ,  G06F11/261 ,  G06F15/7814

Abstract: A microcontroller fabricated on a semiconductor chip has an on-chip EPROM program memory with programmable EPROM configuration fuses located in a limited number of addresses of the on-chip program memory, the condition of each of EPROM fuse being defined as blown or not blown according to the value of the bit stored in the respective address of the on-chip program memory. The operating modes of the microcontroller are configurable by appropriately programming at least some of the EPROM fuses. Testing of the microcontroller in at least some of the operating modes is achieved by using latches outside the program memory to emulate the EPROM fuses, while suppressing the capability to set the condition of the EPROM fuses during the testing. Upon completion of the testing, control of the operating modes of the microcontroller is returned to the EPROM fuses, and the latches are precluded from further emulating the EPROM fuses.

公开(公告)号：EP0847573A1

公开(公告)日：1998-06-17

申请号：EP97931324.0

申请日：1997-06-27

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： DRAKE, Rodney ,  ALLEN, Ray

IPC: G02F1 ,  G06F3 ,  G09G3

CPC classification number: G06F3/147 ,  G09G3/18 ,  G09G3/3696

Abstract: A dual port random access memory (RAM) stores data representative of information to be displayed on the LCD. The RAM includes a plurality of master data storage latches (150-153) and a single slave data storage latch (154) shared by all of the plurality of master storage latches (150-153). A microcontroller has a central processing unit (CPU) for communicating with the master storage latches (150-153) via one of the RAM ports to periodically change the data stored therein. An LCD control module successively updates the data in the single slave storage latch (154) with data from each of the master storage latches (150-153) and downloads the updated data from the single slave storage latch (154) to a temporary store associated with the LCD after each update from a master storage latch and before the update of data from the next master storage latch.