公开(公告)号：EP2826623A4

公开(公告)日：2016-01-13

申请号：EP13767488

申请日：2013-03-26

Applicant: JX NIPPON MINING & METALS CORP

Inventor： NAGAURA TOMOTA ,  KOHIKI MICHIYA ,  MORIYAMA TERUMASA

IPC: B32B15/01 ,  B32B3/30 ,  H05K1/09 ,  H05K3/06 ,  H05K3/24

CPC classification number: H05K1/09 ,  B32B3/30 ,  B32B15/01 ,  B32B15/08 ,  B32B15/20 ,  B32B2307/306 ,  B32B2307/714 ,  B32B2457/08 ,  C22C9/00 ,  C25D1/04 ,  C25D3/12 ,  C25D3/38 ,  C25D5/12 ,  C25D9/08 ,  H05K1/0313 ,  H05K3/022 ,  H05K3/025 ,  H05K3/06 ,  H05K3/181 ,  H05K3/188 ,  H05K3/381 ,  H05K3/383 ,  H05K3/388 ,  H05K2201/09009 ,  Y10T428/12549 ,  Y10T428/12569 ,  Y10T428/12611 ,  Y10T428/12792 ,  Y10T428/12847 ,  Y10T428/12903 ,  Y10T428/1291

Abstract: Provided is a copper foil for a printed wiring board including a roughened layer on at least one surface thereof. In the roughened layer, the average diameter D1 at the particle bottom being apart from the bottom of each particle by 10% of the particle length is 0.2 to 1.0 µm, and the ratio L1/D1 of the particle length L1 to the average diameter D1 at the particle bottom is 15 or less. In the copper foil for printed wiring board, when a copper foil for printed wiring having a roughened layer is laminated to a resin and then the copper layer is removed by etching, the sum of areas of holes accounting for the resin roughened surface having unevenness is 20% or more. The present invention involves the development of a copper foil for a semiconductor package substrate that can avoid circuit erosion without causing deterioration in other properties of the copper foil. In particular, an object of the present invention is to provide a copper foil for a printed wiring board and a method of producing the copper foil, in which the adhesion strength between the copper foil and the resin can be enhanced by improvement of the roughened layer of the copper foil.

Abstract translation: 本发明提供一种印刷布线板，其包括在其至少一个表面上的粗糙层的铜箔。 在粗糙化层，在颗粒底部从各粒子的粒子长度的10％的底部是开的平均直径D1为0.2〜1.0微米，并且比率L1 /粒子长度L1至平均直径D1的D1 在颗粒底部是15或更小。 在用于印刷线路板的铜箔，当具有粗糙层印刷布线的铜箔层压到树脂中，然后将铜层通过蚀刻去除的占具有树脂粗糙表面的不均匀的孔面积的总和是 20％或更多。 本发明涉及的铜箔的用于半导体封装基板那样可避免电路腐蚀而不会在铜箔的其它性质引起变质的发展。 特别是，关于本发明的目的是提供一种印刷电路板用铜箔及其制造铜箔，其中该铜箔和树脂之间的粘合强度可通过改进粗糙层来增强的方法 的铜箔。

公开(公告)号：US20240290711A1

公开(公告)日：2024-08-29

申请号：US18656622

申请日：2024-05-07

Applicant: InnoLux Corporation

Inventor： Chiu-Yuan Huang ,  Pei-Chieh Chen ,  Yu-Ting Liu ,  Tsung-Yeh Ho

IPC: H01L23/498 ,  G02F1/1333 ,  H01R12/70 ,  H01R12/77 ,  H05K1/18 ,  H10K77/10

CPC classification number: H01L23/4985 ,  G02F1/133305 ,  H01R12/7076 ,  H01R12/77 ,  H05K1/189 ,  H10K77/111 ,  H05K2201/09009 ,  H05K2201/10128

Abstract: The present disclosure provides an electronic device including a conductive element, a first insulating layer, an extending element, and a second insulating layer disposed on a substrate. At least a portion of the first insulating layer is located between the conductive element and the extending element. The second insulating layer is disposed on the conductive element and the extending element. In a cross-sectional view, a thickness of the first insulating layer is different from a thickness of the second insulating layer. In a top view, the extending element has a first portion extending to an edge of the substrate, the extending element has a second portion connecting the first portion and disposed between the first portion and the conductive element, and the first minimum width of the first portion is less than the second minimum width of the second portion.

公开(公告)号：US20190212000A1

公开(公告)日：2019-07-11

申请号：US16246803

申请日：2019-01-14

Applicant: Fluence Bioengineering

Inventor： Dung Duong ,  Randy Johnson ,  Nick Klase

IPC: F21V23/00 ,  H05K1/05 ,  F21V19/00 ,  H05K1/18 ,  H05K1/02 ,  H05K3/44 ,  A01G7/04 ,  H05K3/28 ,  H05K3/00 ,  F21V29/74 ,  F21K9/90 ,  H05K3/32 ,  F21S4/28 ,  F21V15/015 ,  F21V17/10 ,  F21V7/00 ,  F21V7/05 ,  F21K9/232 ,  F21V29/83 ,  F21V29/70 ,  F21V23/02

CPC classification number: F21V23/005 ,  A01G7/045 ,  F21K9/232 ,  F21K9/90 ,  F21S4/28 ,  F21V7/005 ,  F21V7/0066 ,  F21V7/05 ,  F21V15/015 ,  F21V17/107 ,  F21V19/0015 ,  F21V19/003 ,  F21V23/001 ,  F21V23/02 ,  F21V23/0442 ,  F21V29/70 ,  F21V29/74 ,  F21V29/83 ,  F21Y2103/10 ,  F21Y2105/16 ,  F21Y2115/10 ,  H05B33/0854 ,  H05B37/0227 ,  H05B37/0272 ,  H05K1/0203 ,  H05K1/0209 ,  H05K1/0274 ,  H05K1/0277 ,  H05K1/05 ,  H05K1/056 ,  H05K1/181 ,  H05K1/182 ,  H05K1/185 ,  H05K3/0014 ,  H05K3/28 ,  H05K3/32 ,  H05K3/44 ,  H05K2201/066 ,  H05K2201/09009 ,  H05K2201/10106

Abstract: Examples of the present disclosure are related to systems and methods for lighting fixtures. More particularly, embodiments disclose directly embedded a smart module with a lighting fixture utilizing metal core PCB (MCPCB).

公开(公告)号：US20190203915A1

公开(公告)日：2019-07-04

申请号：US16239668

申请日：2019-01-04

Applicant: Fluence Bioengineering

Inventor： Dung Duong ,  Randy Johnson ,  Nick Klase

IPC: F21V23/00 ,  F21V29/74 ,  H05K3/00 ,  H05K1/18 ,  H05K1/02 ,  H05K3/44 ,  A01G7/04 ,  H05K3/28 ,  H05K3/32 ,  F21K9/90 ,  H05K1/05 ,  F21V19/00 ,  F21S4/28 ,  F21V15/015 ,  F21V17/10 ,  F21V7/00 ,  F21V7/05 ,  F21K9/232 ,  F21V29/83 ,  F21V29/70 ,  F21V23/02

CPC classification number: F21V23/005 ,  A01G7/045 ,  F21K9/232 ,  F21K9/90 ,  F21S4/28 ,  F21V7/005 ,  F21V7/0066 ,  F21V7/05 ,  F21V15/015 ,  F21V17/107 ,  F21V19/0015 ,  F21V19/003 ,  F21V23/001 ,  F21V23/02 ,  F21V23/0442 ,  F21V29/70 ,  F21V29/74 ,  F21V29/83 ,  F21Y2103/10 ,  F21Y2105/16 ,  F21Y2115/10 ,  H05B33/0854 ,  H05B37/0227 ,  H05B37/0272 ,  H05K1/0203 ,  H05K1/0209 ,  H05K1/0274 ,  H05K1/0277 ,  H05K1/05 ,  H05K1/056 ,  H05K1/181 ,  H05K1/182 ,  H05K1/185 ,  H05K3/0014 ,  H05K3/28 ,  H05K3/32 ,  H05K3/44 ,  H05K2201/066 ,  H05K2201/09009 ,  H05K2201/10106

Abstract: Examples of the present disclosure are related to systems and methods for lighting fixtures. More particularly, embodiments disclose lighting fixtures utilizing metal core PCB (MCPCB) for optical controls.

公开(公告)号：US20190174662A1

公开(公告)日：2019-06-06

申请号：US16258817

申请日：2019-01-28

Applicant: CKD Corporation

Inventor： Takahiro Ninomiya ,  Kensuke Takamura ,  Nobuyuki Umemura

IPC: H05K13/08 ,  H05K13/04 ,  H05K3/00 ,  G01N21/84 ,  H05K1/02

CPC classification number: H05K13/081 ,  G01N21/84 ,  H05K1/0269 ,  H05K3/0044 ,  H05K13/04 ,  H05K2201/09009 ,  H05K2201/09918

Abstract: A substrate position detection device includes: an irradiator that irradiates a predetermined range of a substrate with a predetermined light; an imager that takes an image of the predetermined range of the substrate irradiated with the predetermined light; a moving mechanism that causes a relative movement of the imager and the substrate; and a controller that: detects a position of the substrate by sequentially executing to a plurality of recognition objects on the substrate: a moving process of relatively moving the imager to a position corresponding to a predetermined recognition object among the plurality of recognition objects on the substrate; an imaging process of taking an image of the predetermined recognition object under a predetermined imaging condition; and a recognition process of recognizing the predetermined recognition object based on image data obtained by the imaging process.

公开(公告)号：US20180356067A1

公开(公告)日：2018-12-13

申请号：US15829197

申请日：2017-12-01

Applicant: Fluence Bioengineering

Inventor： Dung Duong ,  Randy Johnson ,  Nick Klase

IPC: F21V7/00 ,  F21V7/05 ,  H05K1/05 ,  H05K1/02 ,  H05K3/28 ,  H05K3/00 ,  H05K1/18 ,  H05K3/44 ,  A01G7/04

CPC classification number: F21V29/70 ,  A01G7/045 ,  F21K9/232 ,  F21K9/90 ,  F21S4/28 ,  F21V7/005 ,  F21V7/0066 ,  F21V7/05 ,  F21V15/015 ,  F21V17/107 ,  F21V19/0015 ,  F21V19/003 ,  F21V23/001 ,  F21V23/005 ,  F21V23/02 ,  F21V29/74 ,  F21V29/83 ,  F21Y2103/10 ,  F21Y2105/16 ,  F21Y2115/10 ,  H05B33/0854 ,  H05B37/0272 ,  H05K1/0203 ,  H05K1/0274 ,  H05K1/0277 ,  H05K1/05 ,  H05K1/181 ,  H05K1/182 ,  H05K1/185 ,  H05K3/0014 ,  H05K3/28 ,  H05K3/32 ,  H05K3/44 ,  H05K2201/066 ,  H05K2201/09009 ,  H05K2201/10106

Abstract: Examples of the present disclosure are related to systems and methods for lighting fixtures. More particularly, embodiments disclose lighting fixtures utilizing metal core PCB (MCPCB) for optical controls.

公开(公告)号：US20180255659A1

公开(公告)日：2018-09-06

申请号：US15906394

申请日：2018-02-27

Applicant: CONTINENTAL AUTOMOTIVE GMBH

Inventor： Christian Harrer ,  Andreas Bernhardt

IPC: H05K7/14 ,  H05K1/18 ,  H05K1/02

CPC classification number: H05K7/1427 ,  H05K1/0204 ,  H05K1/028 ,  H05K1/181 ,  H05K5/0039 ,  H05K2201/056 ,  H05K2201/09009

Abstract: The invention relates to an electronic device having a multi-part printed circuit board, the printed circuit board parts of which are connected to one another by current-carrying, flexible regions, having a support, around which the printed circuit board bent around the flexible regions of the printed circuit board is arranged and fixed, and having a housing in which the printed circuit board mounted on the support is fixed.

公开(公告)号：US20180184528A1

公开(公告)日：2018-06-28

申请号：US15460271

申请日：2017-03-16

Applicant: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED ,  LITE-ON TECHNOLOGY CORPORATION

Inventor： Yi-Feng Pu ,  Po-Yu Cheng ,  Tzu-Shu Lin

IPC: H05K3/28 ,  H05K1/18 ,  H05K3/30 ,  H05K3/46 ,  H05K1/02

CPC classification number: H05K3/284 ,  H05K1/0216 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/185 ,  H05K3/303 ,  H05K3/4688 ,  H05K2201/09009

Abstract: A packaging structure and a packaging method of an electronic product are disclosed. The packaging structure of an electronic product includes a supporting structure, a flexible board and a covering layer. The supporting structure has a shape. The flexible board is stacked on the supporting structure, and has an electronic device disposed thereon. The covering layer is attached on the stacked supporting structure and flexible board and covering the electronic device. The shapes of the flexible board and the covering layer conform to the shape of the supporting structure, and the flexible board and the electronic device are tightly interposed between the covering layer and the supporting structure. The covering layer includes a thermoforming film and at least a function film stacked on the thermoforming film.

公开(公告)号：US09980364B2

公开(公告)日：2018-05-22

申请号：US15077211

申请日：2016-03-22

Applicant: YAZAKI CORPORATION

Inventor： Akira Harao ,  Mototatsu Matsunaga ,  Yasuhiro Sugiura ,  Minoru Kubota

IPC: H05K1/00 ,  H05K1/02 ,  H01R12/72 ,  H05K3/36 ,  H05K1/11 ,  H05K3/10 ,  H01L23/498 ,  H05K7/10 ,  H05K1/05 ,  H05K3/20 ,  H05K3/34 ,  H05K1/14

CPC classification number: H05K1/0204 ,  H01L23/49861 ,  H01L2224/05571 ,  H01L2224/48091 ,  H01L2225/1094 ,  H01R12/728 ,  H05K1/0203 ,  H05K1/05 ,  H05K1/056 ,  H05K1/11 ,  H05K1/14 ,  H05K3/10 ,  H05K3/202 ,  H05K3/3447 ,  H05K3/368 ,  H05K7/1046 ,  H05K2201/09009 ,  H05K2201/09063 ,  H05K2201/10757 ,  H05K2201/10787 ,  H05K2203/025 ,  Y10T29/49147 ,  Y10T29/49155

Abstract: Disclosed is wiring substrate, the wiring substrate including a substrate having a high thermal conductive layer, in which at least one of a front surface and a rear surface of the substrate is a mounting surface for a variety of components; a window section formed in the substrate; and a connection terminal extended from an inside surface portion of the window section and bending in a direction perpendicular to a surface of the substrate.

公开(公告)号：US20180069210A1

公开(公告)日：2018-03-08

申请号：US15426395

申请日：2017-02-07

Applicant: Apple Inc.

Inventor： Nathan J. Bohney ,  Todd L. Mumaw

IPC: H01M2/10 ,  H05K1/09 ,  H05K1/11 ,  H05K1/18 ,  H01M2/20 ,  H01M10/42

CPC classification number: H01M2/1055 ,  H01M2/204 ,  H01M10/425 ,  H01M2220/30 ,  H05K1/09 ,  H05K1/115 ,  H05K1/117 ,  H05K1/18 ,  H05K1/181 ,  H05K3/403 ,  H05K2201/09009 ,  H05K2201/09027 ,  H05K2201/09181 ,  H05K2201/10037 ,  H05K2201/10151 ,  H05K2201/10287 ,  H05K2201/10295 ,  H05K2201/10522 ,  H05K2201/10583

Abstract: A streamlined battery pack can contain at least two battery cells. A printed circuit board (PCB) of the battery pack can include a protection control module. The PCB can have castellations along its perimeter in which wires are soldered. The wires can include battery power wires and battery monitoring signal wires. The castellations are sized so that the egress wires can be soldered therein without substantially protruding from the outline of the PCB. The PCB has a surface area that is no greater than an end of the battery pack, and thereby need not exceed the outer diameter of the remainder of the battery pack. The PCB and the other battery pack components may be substantially enveloped in a polyimide material. The components of the battery pack, including the PCB can arranged, sized and configured, such that they do not create protuberances in the enveloping material.