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公开(公告)号：KR1020160001966A
公开(公告)日：2016-01-07
申请号：KR1020140080542
申请日：2014-06-30
Applicant: 삼성전자주식회사
IPC: H05K5/02
CPC classification number: G03B17/561 , A45C11/00 , A45C11/38 , A45C2011/001 , A45C2011/002 , A45C2011/003 , A45C2013/025 , A45F5/00 , F16M11/14 , F16M11/18 , F16M13/00
Abstract: 본발명의일 실시예에의한전자장치휴대용케이스는내부는함몰되어일측으로개방된중공이형성되고, 외주면은곡면으로형성되는케이스부및 일측이상기케이스부에서착탈가능하게구비되고, 내측으로함몰되는곡면이형성되는마운트부를포함할수 있고, 다양한실시예가가능하다.
Abstract translation: 根据本发明的一个实施例，一种用于电子设备的便携式外壳包括：具有凹陷内侧的外壳部分，具有一个开口侧的中空部和弯曲的外周面; 以及安装单元，其包括可拆卸地制备在壳体单元中的一侧和向其内侧凹陷的曲面。 各种实施例是可能的。
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Patent Agency Ranking
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公开(公告)号：KR1020140017750A
公开(公告)日：2014-02-12
申请号：KR1020120084086
申请日：2012-07-31
Applicant: 삼성전자주식회사
IPC: H01L27/115 , H01L21/8247
CPC classification number: H01L29/792 , H01L23/528 , H01L27/1157 , H01L27/11582 , H01L29/045 , H01L29/1037 , H01L29/42364 , H01L29/511 , H01L29/66833 , H01L29/7926 , H01L2924/0002 , H01L2924/00 , H01L21/823487
Abstract: The present invention relates to a semiconductor memory device and a method for fabricating the same. The semiconductor memory device includes gates vertically laminated on the upper surface of a substrate having an epi layer, a vertical channel vertically penetrating the gates and electrically connected to the epi layer, and an information storage layer formed between the vertical channel and the gates. The upper surface of the epi layer may be in a level between the lower surface of the lowermost one of the gates and the upper surface of the substrate.
Abstract translation: 半导体存储器件及其制造方法技术领域本发明涉及一种半导体存储器件及其制造方法。 半导体存储器件包括垂直层叠在具有外延层的衬底的上表面上的栅极，垂直穿过栅极并电连接到外延层的垂直沟道以及形成在垂直沟道和栅极之间的信息存储层。 外延层的上表面可以在最下面一个栅极的下表面和基板的上表面之间的水平面中。
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